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| author | Dhaval Patel <pdhaval@codeaurora.org> | 2016-03-18 14:47:42 -0700 |
|---|---|---|
| committer | Kyle Yan <kyan@codeaurora.org> | 2016-04-28 16:40:55 -0700 |
| commit | 3c8a08cef8e55d94bf390ffb7122c1d5e828da6f (patch) | |
| tree | dec94cd0be44d12ac881069f27711684efe195be /tools/perf/scripts/python | |
| parent | fdef8552e64e9b26841d66f24aab41579f2c607c (diff) | |
ARM: dts: msm: add mdss smmu register range for msm8996
Add mdss smmu context bank register range for
msm8996 target.
Change-Id: I863f7e57cce9fa12e0d8a603ac50c42775d62414
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions