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authorJordan Crouse <jcrouse@codeaurora.org>2017-02-13 10:14:26 -0700
committerJordan Crouse <jcrouse@codeaurora.org>2017-02-22 09:52:22 -0700
commit3b045f8fff410937f91e95156a0c955297a3bd39 (patch)
treec6a2c313babbe6749eab78cbce0f04b40e607233 /tools/perf/scripts/python
parent425372c0ba8e332995e05be0ba6ec513192512d2 (diff)
drm/msm: Implement preemption for A5XX targets
Implement preemption for A5XX targets - this allows multiple ringbuffers for different priorities with automatic preemption of a lower priority ringbuffer if a higher one is ready. Change-Id: Ic0dedbad428360d23768d52b585021237c6bc3d3 Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Diffstat (limited to 'tools/perf/scripts/python')
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