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| author | Chandan Uddaraju <chandanu@codeaurora.org> | 2016-08-08 09:56:03 -0700 |
|---|---|---|
| committer | Chandan Uddaraju <chandanu@codeaurora.org> | 2016-08-22 21:11:06 -0700 |
| commit | 3156dc80cb80cafff2721589d5b749bb403104da (patch) | |
| tree | c6370b008579c501229396eec976f0a3822f493f /tools/perf/scripts/python | |
| parent | 9ec9267905e8e712eba27c106c96e78c6da3e56f (diff) | |
clk: msm: mdss: update Dp PLL/Phy configuration
Update the Display-Port PHY and PLL configuration
with the recommended settings. Remove the
support for 9.72Ghz VCO frequency. Update the divider
settings to support the new frequency plan.
Update the Phy Aux settings and voltage/pre-emphasis
settings according to recommended configuration.
Change-Id: Ic4d206da3dc6b45214e7601e7556cfb0bef81a7d
Signed-off-by: Chandan Uddaraju <chandanu@codeaurora.org>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions