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authorCorey Minyard <cminyard@mvista.com>2016-04-11 09:10:19 -0500
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2017-05-02 21:19:49 -0700
commit2907c91c9f9a69a3c1250dc08a146f255f26d0aa (patch)
tree428e1483ef1792cb0c936a30abe0b819a3a7fae7 /tools/perf/scripts/python
parent49b2fe4b020776640268a5d75c5eca712fcc7b01 (diff)
MIPS: Fix crash registers on non-crashing CPUs
commit c80e1b62ffca52e2d1d865ee58bc79c4c0c55005 upstream. As part of handling a crash on an SMP system, an IPI is send to all other CPUs to save their current registers and stop. It was using task_pt_regs(current) to get the registers, but that will only be accurate if the CPU was interrupted running in userland. Instead allow the architecture to pass in the registers (all pass NULL now, but allow for the future) and then use get_irq_regs() which should be accurate as we are in an interrupt. Fall back to task_pt_regs(current) if nothing else is available. Signed-off-by: Corey Minyard <cminyard@mvista.com> Cc: David Daney <ddaney@caviumnetworks.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/13050/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Cc: Julia Lawall <julia.lawall@lip6.fr> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'tools/perf/scripts/python')
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