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| author | Puja Gupta <pujag@codeaurora.org> | 2016-04-05 14:19:18 -0700 |
|---|---|---|
| committer | Jeevan Shriram <jshriram@codeaurora.org> | 2016-04-07 16:02:17 -0700 |
| commit | 1729a920de0b697e578b696c1952835b019d5329 (patch) | |
| tree | d71a303c051083e412433915feeace6cb88cae99 /tools/perf/scripts/python | |
| parent | 4f528714fdcf8ef7aef61695f33f30cd86849f25 (diff) | |
ARM: dts: msm: Modem PIL clock change for MSMCOBALT
Change modem pil proxy voting from 'clk_gcc_mss_q6_bimc_axi_clk' to
'clk_gcc_bimc_mss_q6_axi_clk'
CRs-Fixed: 1000636
Change-Id: I5a77c08532bb5e841f8c1e8e494857e1361dfc40
Signed-off-by: Puja Gupta <pujag@codeaurora.org>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions