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| author | Clarence Ip <cip@codeaurora.org> | 2016-08-25 18:29:03 -0400 |
|---|---|---|
| committer | Clarence Ip <cip@codeaurora.org> | 2016-09-12 15:42:37 -0400 |
| commit | c93c7b0138a16e0b267c4c276745fb31c4fa5c3a (patch) | |
| tree | fa3a4d239aeab8262fb187fd81ac6cd4974f3869 /tools/perf/scripts/python/syscall-counts.py | |
| parent | 593f3c3e66f76cc48ad295bcc990396e4e32fe13 (diff) | |
drm/msm/sde: determine output fence timing on create
Allow for output fence signal time to be determined during each
fence create rather than at initialization. This provides for
more flexibility to support use cases that require different
signalling times.
Change-Id: I2a9467c225e5632a01cd556553368d0990a94327
Signed-off-by: Clarence Ip <cip@codeaurora.org>
Diffstat (limited to 'tools/perf/scripts/python/syscall-counts.py')
0 files changed, 0 insertions, 0 deletions