diff options
| author | Stuart Menefy <stuart.menefy@mathembedded.com> | 2019-02-10 22:51:13 +0000 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2019-03-23 08:44:35 +0100 |
| commit | 3e08ffef428689e452e169bd23ae7b35affb6f8f (patch) | |
| tree | c9c77d6a8e0fd330687865747f4dfabb3543d177 /tools/perf/scripts/python/syscall-counts.py | |
| parent | 3f0edcec1da064584b322372f87677f652c6b2cd (diff) | |
clocksource/drivers/exynos_mct: Move one-shot check from tick clear to ISR
commit a5719a40aef956ba704f2aa1c7b977224d60fa96 upstream.
When a timer tick occurs and the clock is in one-shot mode, the timer
needs to be stopped to prevent it triggering subsequent interrupts.
Currently this code is in exynos4_mct_tick_clear(), but as it is
only needed when an ISR occurs move it into exynos4_mct_tick_isr(),
leaving exynos4_mct_tick_clear() just doing what its name suggests it
should.
Signed-off-by: Stuart Menefy <stuart.menefy@mathembedded.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Cc: stable@vger.kernel.org # v4.3+
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'tools/perf/scripts/python/syscall-counts.py')
0 files changed, 0 insertions, 0 deletions