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| author | Paulo Zanoni <paulo.r.zanoni@intel.com> | 2012-10-23 18:30:00 -0200 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2012-10-26 10:24:48 +0200 |
| commit | c9809791ae0ae3e5792fc6ad3d4a5d9658aadc62 (patch) | |
| tree | d45f5cf23c3bb15b0fa3147892a75e28b88d380a /tools/perf/scripts/python/sched-migration.py | |
| parent | 702e7a56af3780d8b3a717f698209bef44187bb0 (diff) | |
drm/i915: convert PIPE_MSA_MISC to transcoder
Same as the other registers. This one also appeared on Haswell for the
first time, so that's why we are renaming it.
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'tools/perf/scripts/python/sched-migration.py')
0 files changed, 0 insertions, 0 deletions