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| author | Shilun Wan <swan@codeaurora.org> | 2018-09-05 16:26:01 +0800 |
|---|---|---|
| committer | Shilun Wan <swan@codeaurora.org> | 2018-09-14 14:14:05 +0800 |
| commit | 81c494178e159999568340c82992e22fdc0cfced (patch) | |
| tree | f435d52c3ca613b790bf70e565f960627dc0d8a4 /tools/perf/scripts/python/sched-migration.py | |
| parent | dffb51fe96bd2130002f8ca891845f94e5fe494c (diff) | |
msm: dba: adv7533: Fix DSI-HDMI display not up issue
If the value of cec 0x16 register(dsi pclk divider) is not
configured correctly,dsi-hdmi display through bridge chip
can't be up. So set automatic pclk divider to this register
to apply for all resolution cases from DSI.
Change-Id: Ib464807cd88d3bdb69fe6a0497621f6f10e6c08d
Signed-off-by: Shilun Wan <swan@codeaurora.org>
Diffstat (limited to 'tools/perf/scripts/python/sched-migration.py')
0 files changed, 0 insertions, 0 deletions