diff options
| author | Paulo Zanoni <paulo.r.zanoni@intel.com> | 2012-10-15 15:51:34 -0300 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2012-10-17 22:17:26 +0200 |
| commit | d6c0d722aea21d4073629a7401d086229b582f6e (patch) | |
| tree | 8eabb7d382027481dd76324e6e079502bdd40502 /tools/perf/scripts/python/netdev-times.py | |
| parent | 068759bd6ee26b5c69977d99611cc72b43280ab5 (diff) | |
drm/i915: add basic Haswell DP link train bits
Previously, the DP register was used for everything. On Haswell, it
was split into DDI_BUF_CTL (which is the new intel_dp->DP register)
and DP_TP_CTL.
The logic behind this patch is based on a patch written by Shobhit
Kumar, but the way the code was written is very different.
Credits-to: Shobhit Kumar <shobhit.kumar@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
[danvet: Fixup the logic error spotted by Jani Nikula.]
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'tools/perf/scripts/python/netdev-times.py')
0 files changed, 0 insertions, 0 deletions
