diff options
| author | Easwar Hariharan <easwar.hariharan@intel.com> | 2015-10-26 10:28:28 -0400 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2015-10-27 17:16:54 +0900 |
| commit | 7c03ed85678cec9792430bdd728d3565e4cce9ae (patch) | |
| tree | 5d804ddd2725b170b4705a07a81356185dd3f19b /tools/perf/scripts/python/netdev-times.py | |
| parent | 13a69f5299688074666e1f74b90ddc6beae43e6d (diff) | |
staging/rdma/hfi1: Fix code to reset ASIC CSRs on FLR
The ASIC registers were not reset on FLR, and the code to
protect the ASIC block against multiple initializations by
peer HFIs did not extend to multiple ASICs in a system. This
patch addresses this gap.
Reviewed-by: Dean Luick <dean.luick@intel.com>
Signed-off-by: Easwar Hariharan <easwar.hariharan@intel.com>
Signed-off-by: Ira Weiny <ira.weiny@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'tools/perf/scripts/python/netdev-times.py')
0 files changed, 0 insertions, 0 deletions