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authorH Hartley Sweeten <hsweeten@visionengravers.com>2015-01-20 14:53:06 -0700
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2015-01-25 19:59:10 +0800
commit7bd428c43437ddd401af6b3214051f89628ac12f (patch)
tree8bc86a6c963bc717fb5aea1d913382bf222de71d /tools/perf/scripts/python/netdev-times.py
parentabd2839c596cd598a52f716a9e409d000a40235b (diff)
staging: comedi: adv_pci1710: change boardinfo 'fifo_half_size' to 'has_large_fifo'
The boards supported by this driver have a 4K or 1K FIFO that is used when reading analog input samples when running an async command. The maximum number of samples in the FIFO is half the FIFO size due to the 2 bytes/sample (12-bit resolution). For aesthetics, change the 'fifo_half_size' member to a bit-field flag 'has_large_fifo' and add a new member to the private data to hold the 'max_samples' available in the FIFO. Refactor the board attach and pci1710_handle_fifo() accordingly. Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com> Reviewed-by: Ian Abbott <abbotti@mev.co.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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