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authorDeepak Katragadda <dkatraga@codeaurora.org>2016-03-08 11:53:32 -0800
committerDavid Keitel <dkeitel@codeaurora.org>2016-03-25 16:03:42 -0700
commit3969b42ea58fe258abedc9290c37a00c68e77069 (patch)
tree0399a72cd16ffba79bb521e15df475af2db30c77 /tools/perf/scripts/python/netdev-times.py
parentb03a78230bbd3429e56735c6fb11dddca040b434 (diff)
clk: msm: clock-osm: Set the HMSS GPLL0 RCG to run at 300MHz
The default settings of the gcc_hmss_gpll0_clk_src make it run at 600 MHz. Call set rate on the clock so that its divider settings can be programmed. CRs-Fixed: 989118 Change-Id: I49aee860dd3f0f4f7ecb024228f182d126424906 Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
Diffstat (limited to 'tools/perf/scripts/python/netdev-times.py')
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