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| author | Deepak Katragadda <dkatraga@codeaurora.org> | 2016-05-19 11:59:33 -0700 |
|---|---|---|
| committer | Jeevan Shriram <jshriram@codeaurora.org> | 2016-05-23 11:20:13 -0700 |
| commit | 2e83f533897f8782cc14bb6a68a829e2f13c7d49 (patch) | |
| tree | c6aab17813bb8ef2e6e8daa9b55ce7d6b74fc8b7 /tools/perf/scripts/python/netdev-times.py | |
| parent | 7e3d94815bba14522bdcb365f117b3ccc4b7f687 (diff) | |
clk: msm: clock-alpha-pll: Fix incorrect fabia PLL settings
For the fabia PLL to be in STANDBY mode, the RESET_N bit should
be set so that the PLL comes out of reset. Else, the PLL is
at OFF state and changing it's frequencies would not cause the
ACK_LATCH to be set.
CRs-Fixed: 1018752
Change-Id: I30f1ee0f4fdb8d92a9f6e187c1d8b797a0bdc94d
Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
Diffstat (limited to 'tools/perf/scripts/python/netdev-times.py')
0 files changed, 0 insertions, 0 deletions