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| author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2015-07-08 23:45:57 +0300 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2015-08-26 14:37:24 +0200 |
| commit | ee27921824e6ad0ca2d8e5abfa12cf4d853ded6c (patch) | |
| tree | 1904356a78eb8ebfbec55dfd589fd7743e296662 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | 0047eedc48869f8c7797dd10f0cf976ac34c1d33 (diff) | |
drm/i915: Enable DPIO SUS clock gating on CHV
CHV has supports some form of automagic clock gating for the
DPIO SUS clock. We can simply enable the magic bits and the
hardware should take care of the rest.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Deepak S <deepak.s@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions