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authorChandan Uddaraju <chandanu@codeaurora.org>2016-05-12 13:14:35 -0700
committerKyle Yan <kyan@codeaurora.org>2016-06-03 14:46:56 -0700
commitcea962b52ff896ee2ec7423d867b6b22b7121750 (patch)
tree2afc63df4cdb7ac545f8b232313d1a75ccb0a4f2 /tools/perf/scripts/python/export-to-postgresql.py
parentdc284e65df63ec8fa57302dc2e02304f22f086f8 (diff)
ARM: dts: msm: fix DP PHY and PLL register base address for msmcobalt
Update the DP PLL node with the correct base address for PHY and PLL registers. CRs-Fixed: 1009740 Change-Id: I7194e72a191f2f52dd708c84d5a8ab55f03729fe Signed-off-by: Chandan Uddaraju <chandanu@codeaurora.org>
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