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| author | Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com> | 2015-04-02 14:47:56 +0300 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2015-04-10 08:55:55 +0200 |
| commit | 304603f47a7487309d5c450f438c59e92af2d93a (patch) | |
| tree | 1c35a46a245ba877b38e556ed3ada822c3d92687 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | c929cb4524a304cb366854836ef7baf501ef6d06 (diff) | |
drm/i915: Don't use staged config for VLV cdclk calculations
Now that we use a drm atomic state for the legacy modeset, it is
possible to get rid of the usage of intel_crtc->new_config in the
function intel_mode_max_pixclk().
Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions