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authorClarence Ip <cip@codeaurora.org>2016-05-26 00:58:42 -0400
committerDhaval Patel <pdhaval@codeaurora.org>2016-08-01 11:58:09 -0700
commitb7111a060e84bdad5d010e3eef2f5e25f98f8c8f (patch)
treeb9a60bbd8a9839c2abffd48bd06ef4bfc3bdd778 /tools/perf/scripts/python/compaction-times.py
parentfdd040d70dc9a770e8ff9f11e888587c51bd4fb8 (diff)
drm/msm/sde: change csc matrix coeff in h/w driver to s15.16
Actual register fixed point format should be encapsulated within h/w layer, and not within the planes driver. Adopt a standard S15.16 fixed point format between the h/w layer and planes. Change-Id: I786a0c617a179d6d8405ef6cfeb0560eca324306 Signed-off-by: Clarence Ip <cip@codeaurora.org>
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