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authorDavid Collins <collinsd@codeaurora.org>2016-03-04 16:52:14 -0800
committerDavid Keitel <dkeitel@codeaurora.org>2016-03-25 16:03:06 -0700
commite511ef114484222a32c48349587f177b356260ce (patch)
tree3b08b8d8594b3e0b4df281b043cb3228530c3fe2 /tools/perf/scripts/python/check-perf-trace.py
parent133449301d8d312f08bc02690b77e629ebf30ba5 (diff)
ARM: dts: msm: increase VDD_APCC MinSVS CPR voltage margin for msm8996pro
Characterization has shown that the initial VDD_APCC CPR revision 0 voltage margin adjustment for MinSVS is too aggressive. Raise this adjustment by 40 mV to ensure stability on all parts. Change-Id: I084e43f4805359c0381c730b26eb85764bd225b1 CRs-Fixed: 985850 Signed-off-by: David Collins <collinsd@codeaurora.org>
Diffstat (limited to 'tools/perf/scripts/python/check-perf-trace.py')
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