summaryrefslogtreecommitdiff
path: root/tools/perf/scripts/python/check-perf-trace.py
diff options
context:
space:
mode:
authorAmey Telawane <ameyt@codeaurora.org>2016-08-18 14:06:29 +0530
committerAmey Telawane <ameyt@codeaurora.org>2016-09-09 16:43:34 +0530
commit7e6d4ff177cba58afa13041c95ff456e8f881568 (patch)
tree2ab94350aa10ceb50171ec3d1dc6017431f47f66 /tools/perf/scripts/python/check-perf-trace.py
parent008f057bbab6dd6629b7e1a3b8c67b650a6b9ef1 (diff)
ARM: dts: msm: add stm dts support for msmfalcon
Add CoreSight-STM support for msmfalcon that is used to collect the HW & SW events. CRs-fixed: 1056777 Change-Id: Ifef16d82f48d2597db4b4dc71bc94c8f1621166e Signed-off-by: Amey Telawane <ameyt@codeaurora.org>
Diffstat (limited to 'tools/perf/scripts/python/check-perf-trace.py')
0 files changed, 0 insertions, 0 deletions