diff options
| author | Bob Paauwe <bob.j.paauwe@intel.com> | 2015-06-25 14:54:07 -0700 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2015-06-26 19:41:15 +0200 |
| commit | 350405623ff3f447813eaef2035272bf05281671 (patch) | |
| tree | 68786b488fcaef15bf0df56765ac01482890ccef /tools/perf/scripts/python/bin | |
| parent | 267db663458a8077a087674fb85ea95f540d8671 (diff) | |
drm/i915: Update rps frequencies for BXT
Broxton is using a different register and different bit ordering
for rps status capabilities.
Also GT perf freqency register is different for Broxton so update
that.
Signed-off-by: Bob Paauwe <bob.j.paauwe@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'tools/perf/scripts/python/bin')
0 files changed, 0 insertions, 0 deletions