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authorVille Syrjälä <ville.syrjala@linux.intel.com>2015-05-22 11:22:33 +0300
committerDaniel Vetter <daniel.vetter@ffwll.ch>2015-05-29 10:15:28 +0200
commit34edce2fea6960ce5855d6e09902f82822c374c5 (patch)
tree2b40d0b590809837df3aaec1ec630aa80240495f /tools/perf/python
parent65cd2b3fa521d1abec13dd36bf1bfc8f2469d8bc (diff)
drm/i915: Add cdclk extraction for g33, g965gm and g4x
Implement cdclk extraction for g33, 965gm and g4x platforms. The details came from configdb. Sadly there isn't anything there for other gen3/gen4 chipsets. So far I've tested this on one ELK where it gave me a HPLL VCO of 5333 MHz and cdclk of 444 MHz which seems perfectly sane for this machine. v2: Rebased to the latest v3: Rebased to the latest Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Mika Kahola <mika.kahola@intel.com> Acked-by: Damien Lespiau <damien.lespiau@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'tools/perf/python')
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