diff options
| author | Soumya Managoli <smanag@codeaurora.org> | 2020-05-20 16:04:00 +0530 |
|---|---|---|
| committer | Gerrit - the friendly Code Review server <code-review@localhost> | 2020-07-13 00:52:11 -0700 |
| commit | 7126fc776a50ed36c7d0ffda5286e8bfb5996378 (patch) | |
| tree | 711bc9c460a9e078bc606540329cebe344cdc897 /sound/soc/codecs | |
| parent | f46488ee3bc9b3c2a3a371d98cd59f047c006f04 (diff) | |
sdm660_cdc: Reset cache_only mode for non SSR scenario
Sometimes during bootup there is afe clk enable failure
and hence regmap cache mode is set as per current design.
Since clk enable request is success next time and there
is no SSR/PDR happening, reset the cache_only mode
to avoid audio failure which is happening
due to enable of regmap cache access.
Change-Id: Iea7f9b04747f3a5117e39d6e0a34b42477f2914a
Signed-off-by: Soumya Managoli <smanag@codeaurora.org>
Diffstat (limited to 'sound/soc/codecs')
| -rw-r--r-- | sound/soc/codecs/sdm660_cdc/msm-digital-cdc.c | 15 | ||||
| -rw-r--r-- | sound/soc/codecs/sdm660_cdc/msm-digital-cdc.h | 3 |
2 files changed, 14 insertions, 4 deletions
diff --git a/sound/soc/codecs/sdm660_cdc/msm-digital-cdc.c b/sound/soc/codecs/sdm660_cdc/msm-digital-cdc.c index dba4f8b48197..e5f079978398 100644 --- a/sound/soc/codecs/sdm660_cdc/msm-digital-cdc.c +++ b/sound/soc/codecs/sdm660_cdc/msm-digital-cdc.c @@ -1,4 +1,4 @@ -/* Copyright (c) 2015-2019, The Linux Foundation. All rights reserved. +/* Copyright (c) 2015-2020, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -42,6 +42,7 @@ #define DEC_SVA 5 #define MSM_DIG_CDC_VERSION_ENTRY_SIZE 32 +#define ADSP_UP 1 static unsigned long rx_digital_gain_reg[] = { MSM89XX_CDC_CORE_RX1_VOL_CTL_B2_CTL, @@ -87,8 +88,13 @@ static int msm_digcdc_clock_control(bool flag) if (flag) { mutex_lock(&pdata->cdc_int_mclk0_mutex); if (atomic_read(&pdata->int_mclk0_enabled) == false) { - if (msm_dig_cdc->regmap->cache_only == true) - return ret; + if (msm_dig_cdc->regmap->cache_only == true) { + if (test_bit(ADSP_UP, + &msm_dig_cdc->status_mask)) + msm_dig_cdc->regmap->cache_only = false; + else + return ret; + } if (pdata->native_clk_set) pdata->digital_cdc_core_clk.clk_freq_in_hz = NATIVE_MCLK_RATE; @@ -1115,9 +1121,11 @@ static int msm_dig_cdc_event_notify(struct notifier_block *block, MSM89XX_CDC_CORE_RX2_B3_CTL, 0x80, 0x00); break; case DIG_CDC_EVENT_SSR_DOWN: + clear_bit(ADSP_UP, &msm_dig_cdc->status_mask); regcache_cache_only(msm_dig_cdc->regmap, true); break; case DIG_CDC_EVENT_SSR_UP: + set_bit(ADSP_UP, &msm_dig_cdc->status_mask); regcache_cache_only(msm_dig_cdc->regmap, false); regcache_mark_dirty(msm_dig_cdc->regmap); @@ -2145,6 +2153,7 @@ static int msm_dig_cdc_probe(struct platform_device *pdev) msm_codec_dais, ARRAY_SIZE(msm_codec_dais)); dev_dbg(&pdev->dev, "%s: registered DIG CODEC 0x%x\n", __func__, dig_cdc_addr); + set_bit(ADSP_UP, &msm_dig_cdc->status_mask); rtn: return ret; } diff --git a/sound/soc/codecs/sdm660_cdc/msm-digital-cdc.h b/sound/soc/codecs/sdm660_cdc/msm-digital-cdc.h index cbb8a8138db8..ab470de460ea 100644 --- a/sound/soc/codecs/sdm660_cdc/msm-digital-cdc.h +++ b/sound/soc/codecs/sdm660_cdc/msm-digital-cdc.h @@ -1,4 +1,4 @@ -/* Copyright (c) 2016-2017, The Linux Foundation. All rights reserved. +/* Copyright (c) 2016-2017, 2020 The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -62,6 +62,7 @@ struct msm_dig_priv { struct notifier_block *nblock, bool enable); struct tx_mute_work tx_mute_dwork[NUM_DECIMATORS]; + unsigned long status_mask; }; struct dig_ctrl_platform_data { |