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authorAnson Huang <Anson.Huang@nxp.com>2016-08-22 23:53:25 +0800
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2016-09-24 10:07:39 +0200
commitc3aea8b87aff8c1a8677fa4993c672c262fa7a3c (patch)
treebc009c55058d772faa810d3c55c2e8673d6119ac /scripts/stackusage
parent11ba8bf8a0fc5df60520bf2f1011550e7cc2ef2e (diff)
ARM: imx6: add missing BM_CLPCR_BYPASS_PMIC_READY setting for imx6sx
commit 8aade778f787305fdbfd3c1d54e6b583601b5902 upstream. i.MX6SX has bypass PMIC ready function, as this function is normally NOT enabled on the board design, so we need to bypass the PMIC ready pin check during DSM mode resume flow, otherwise, the internal DSM resume logic will be waiting for this signal to be ready forever and cause resume fail. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Fixes: ff843d621bfc ("ARM: imx: add suspend support for i.mx6sx") Tested-by: Peter Chen <peter.chen@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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