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authorPaul Burton <paul.burton@imgtec.com>2016-04-21 12:25:38 +0100
committerGreg Kroah-Hartman <gregkh@google.com>2018-02-05 08:58:31 -0800
commit54c1aa3ea2d1bc8612535c677f01b4f14b7551ab (patch)
treea8014d411fd52823b98cece9ca453a59095c1d64 /scripts/objdiff
parentda8a6c79d7a1fd696b745a715045db3bb31110d2 (diff)
UPSTREAM: MIPS: Allow emulation for unaligned [LS]DXC1 instructions
If an address error exception occurs for a LDXC1 or SDXC1 instruction, within the cop1x opcode space, allow it to be passed through to the FPU emulator rather than resulting in a SIGILL. This causes LDXC1 & SDXC1 to be handled in a manner consistent with the more common LDC1 & SDC1 instructions. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Tested-by: Aurelien Jarno <aurelien@aurel32.net> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/13143/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org> (cherry picked from commit e70ac023f9515c70cf2b291a294f0f250df29847) Signed-off-by: Greg Kroah-Hartman <gregkh@google.com>
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