clk: msm: mdss: update PLL configuration to clear precalibrated values

Before going for full PLL enable sequence, we need to clear out the
override bit and precalibrated values of VCO_TUNE and KVCO_CODE, as
these registers might be storing values for old VCO rate. This will
cause the DSI PLL to be in a bad state and hence PLL unlock errors
might occur during use case like resolution switch. So always clear
the precalibrated values first in PLL configuration sequence.

Change-Id: I407920d63b4600b610794141e5b7ceb5a33980c1
Signed-off-by: Sandeep Panda <spanda@codeaurora.org>

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