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authorLinux Build Service Account <lnxbuild@localhost>2016-10-28 01:59:31 -0600
committerLinux Build Service Account <lnxbuild@localhost>2016-10-28 01:59:32 -0600
commit4c3ff3848cb4ee9c56418e6892ca52e265d1fa13 (patch)
treeac4f8810cda81b035799c165eec0d2c721c6c555 /kernel/workqueue.c
parentb080f2e98893799166f0644756ff3080c7ac1f45 (diff)
parentce610f2fc934e89c706a8030b25ce48accced28a (diff)
Promotion of kernel.lnx.4.4-161028.
CRs Change ID Subject -------------------------------------------------------------------------------------------------------------- 1080392 I05345b8f5d108e59863ee4e37ed75fd32a284ee5 ASoC: wcd-dsp-mgr: fix restart logic when codec comes ba 1081345 I69981b603526575758376695d7a5e9affd389dbe ARM: dts: msm: add SLPI fw name property for msmcobalt 1024862 I600c646a0c23b654392d8e00a829bfd88b71c38c msm: mdss: Fix memleak in panel_debug_reg_write 1069060 Icbdb05aeb9211665420a872d3453dbbd24fd347b msm: ipa: fix ioctl input param validation 1061018 I738eeb141d323ae1a77f352b11525556888a9243 ARM: dts: msm: fix sd card detection for msmcobalt QRD S 1050304 I9c7afdd74122318fc5f7ebd7c0381a4078d1fb01 msm: mdss: edid: fix dtd parsing 1082022 Iad90353f66cf5ad7f83e3fc252d82cec45abce60 platform: qpnp-revid: Add REVID details for PM/PM2FALCON 1077762 I8121d45fedab6197f8466d25674d5b0decd45f1b ARM: dts: msm: enable esd for nt35597 panels in msmcobal 1080014 Ic5dbac9c2cd31f3193ede7cdc64249f7514e3e98 icnss: Do top level reset when timeout to pull register 1077766 Ie60587aa4a4a48bae70ceac4e053e63fc29f516a ASoC: msm: Add routes for all TDM modes 1078147 I0aa3443a2fddfa200631b6fe9eb22de10178fe46 icnss: Do not parse VBATT DT entry if VBATT feature is d 1080392 Id9cbda04a4c36070e52919d3a34ebc871ac22a8e ASoC: wcd934x: Trigger codec DSP subsystem restart 1081806 I42a47e4386ca7a1bbbec428c8d2cbe307634cd1e ARM: dts: msm: Add support for Modem PIL on msmtriton 1081547 I64f0f5b15cc5d9185e415f0b26e276e111c885ec usb: dwc3: gadget: Remove dev_WARN_ONCE in dwc3_gadget_e 1082650 Iab7fc8551b628c443ce751026b06c5ff4ebba39a sched: Fix compilation issue with reset_hmp_stats 1082650 Idb74e9df4fcb55085ac869f5ba273cef4a3eb9eb sched/fair: Fix compilation issue 1069188 I2939e9fd37e96f37101b93dabd86cfdaaf06907f ASoC: wcd934x: Add support for audio subsystem restart 1081010 I16e500aa87813cd3a1e18f134ea1ed145b9e1ef8 msm: sde: Fix SDE rotator clock disable sequence 1074914 I94b9091b8349d6388fbe5c29eabe3666c86e5cce ASoC: msm: Enable Media Format converter for all resampl 1081806 I3e700bdae21b6e18b28cf5982e42e73d7ae953a5 ARM: dts: msm: Add support for Modem PIL on msmfalcon 1077762 I3df0889c1225dcb613910cb90f050a2994f5834d msm: mdss: fix crash when wrong params are passed on the 1065513 I29b9ea41df467d0092be8005733016843dc26f60 input: touchscreen: replace macros used inside the funct 1082047 I6a678d9133b06dda2de1c6cfe4bbafacc594f299 leds: qpnp-wled: add a secure write API 1076402 If06c421c559277066cf9ffd86e71fe366ab7bf8d leds: qpnp-flash-v2: fix safety timer configuration 1081279 I1b614cb70aa43087c122ce6c42305491e5f5b34b clk: qcom: Change clock index for mmssnoc_axi clock for 1081803 Ib0d27c13c0ebdfac629c1469c9a91a0b84d03640 soc: qcom: pil-q6v5: Add support for qdspv62.1.5 reset 1080796 Ife9d6a16e1607b40c71eb1897947bf4645ac9561 USB: dwc3-msm: Disable pipe clock requirement for HS/FS 1025311 I5f9627964d86c51cb8fb0c5c5f7c9f5f2e19b3e7 cfg80211: Add support to configure a beacon data rate 1081430 I2abd67a8ff647165ddedb385e80f8705d73d3100 input: touchscreen: fix compilation errors for Goodix dr 1077525 I012484aa92e8f25ed0ad4f6709a54f40409ab8d2 msm: ipa: Fix the memory leak in error cases 1079971 Ib6bddd5f43b41660304d240db39f4e273ede3af0 input: misc: hbtp_input: Add support for multiple AFE 1082047 I4c99b598d5f484368712eab239f7de70b727c2aa leds: qpnp-wled: Fix configuration of AVDD TRIM and OVP 1075303 I0552bf8a48c214b89e160fe4df145973f02c2788 ASoC: wcd934x-dsp-cntl: fix memory enable/disable sequen 1079311 I58421ba7f784f7467015a5943aecc2dd0022145a leds: qpnp-flash-v2: fix ITARGET configuration 1048242 I2ef9f3e122b39682a743334668fcd0aeb085e147 qcom-charger: set optimal buck switching frequency 1080290 I0f48666ac948a9571e249598ae7cc19df9036b1d qseecom: check buffer size when loading firmware images 1022917 Ib846318dc3d359672314485d386a23fd8621bfda ARM: dts: msm: Add dmic clock rate on ECPP path for msmc 1072280 I9640112b8945dc603e3af55fc1096bea9f7e6634 ASoC: qdsp6v2: fix potential bug of infinite loop 1082047 If0646f5ae111f75ababc405cbd2f7bcea899360e leds: qpnp-wled: add support to read pmic revid 1043802 I1d9d7a6b6bd2d3420a28a8c09868143bb9bd3b27 soc: qcom: add support for fingerprint sensor driver 1076516 If68d029c87db2370f07f279aacbc51d139f00aae msm: mdss: dp: trigger link retraining on link status up 1077773 I99fcbc5c1b36f62ecfa7631f1b51633a7fb08417 ASoC: msmcobalt: Add support for all TDM modes 1080331 Iaec3a17e5eed952ba0abdcffbf321ad942486769 drivers: mfd: wcd934x: Set MBHC registers to volatile 1082440 I287761ce5b13dc139f59270dceac67cc9ae45cff defconfig: Enable CONFIG_ICNSS_DEBUG for 32-bit msmfalco 1082440 I6028d4a01ddfd8f8589a1de5322c2780d256d5bc defconfig: Enable CONFIG_ICNSS_DEBUG for 32-bit msmcorte 1024872 I03ce718b0456d437d31d701586965d0aa7443b51 msm: mdss: Correct the format specifiers in sscanf funct 1076227 Ic756deeabeb0eaaf95e5354b565cf20a85fd7cca msm: mdss: dp: remove programming of maud/naud for audio 1024934 I533e2d6a760ebd52047c521c1a1e85bfc754fce1 msm: mdss: Fix memleak in framebuffer register and remov 1081757 I13156d82f544cd28a1579c23b18182c879c85767 clk: osm: msm: allow WDOG status register to be enabled 1077761 I9cc07edd7d72e7fae8f95b16461aac75c3fa1fc9 ARM: dts: msm: add support for all TDM modes 1024850 I10ea6f2b22d554d02f302f5700f6674d08e4777d msm: mdss: Check for buffer boundary condition in panel_ 1073650 I2836ef5b7f37f627a32a0b4332dc299a60012704 msm: mdss: Avoid adaptive variable refresh during dynami 1081345 I9ecc0cc1b5de5e0bd47c658747463a4498123655 sensors: ssc: add support to read SLPI fw name 1077762 Ia03f76cf13d3787e2e13e27ae0360723fe36d615 ARM: dts: msm: enable esd for jdi qhd cmd mode panel in 1077684 I340f778583bb63d6436c4ef8f51ead77a2871625 msm: mdss: Correct settings when on/off happens in dest- 1022917 I772e05990a796c99c3b6b6f50323d87b5894231b ASoC: msmcobalt: Fix MCLK routing on msmcobalt for WCD93 1082191 If3d964840362b6147ba7c9e26c4a3f5d20e5a557 clk: msm: clock: Remove controlling some graphics clocks 1051643 1054360 I1b3af2a59dabf67a947a59334883ce0437c9ee6f ARM: dts: msm: add PCIe PHY sequence for msmcobalt v2 Change-Id: I673d05df7b013787ac73574a972dd7bade7332af CRs-Fixed: 1076227, 1081757, 1077766, 1077761, 1072280, 1077762, 1022917, 1074914, 1069060, 1051643, 1076516, 1081430, 1080290, 1077525, 1078147, 1081803, 1024862, 1077684, 1048242, 1081806, 1025311, 1081345, 1050304, 1065513, 1081547, 1061018, 1073650, 1082191, 1077773, 1079311, 1082440, 1082650, 1081010, 1080796, 1024872, 1076402, 1054360, 1024934, 1080331, 1079971, 1043802, 1075303, 1024850, 1080392, 1069188, 1082022, 1082047, 1080014, 1081279
Diffstat (limited to 'kernel/workqueue.c')
-rw-r--r--kernel/workqueue.c40
1 files changed, 40 insertions, 0 deletions
diff --git a/kernel/workqueue.c b/kernel/workqueue.c
index ef84d9874d03..316b316c7528 100644
--- a/kernel/workqueue.c
+++ b/kernel/workqueue.c
@@ -652,6 +652,35 @@ static void set_work_pool_and_clear_pending(struct work_struct *work,
*/
smp_wmb();
set_work_data(work, (unsigned long)pool_id << WORK_OFFQ_POOL_SHIFT, 0);
+ /*
+ * The following mb guarantees that previous clear of a PENDING bit
+ * will not be reordered with any speculative LOADS or STORES from
+ * work->current_func, which is executed afterwards. This possible
+ * reordering can lead to a missed execution on attempt to qeueue
+ * the same @work. E.g. consider this case:
+ *
+ * CPU#0 CPU#1
+ * ---------------------------- --------------------------------
+ *
+ * 1 STORE event_indicated
+ * 2 queue_work_on() {
+ * 3 test_and_set_bit(PENDING)
+ * 4 } set_..._and_clear_pending() {
+ * 5 set_work_data() # clear bit
+ * 6 smp_mb()
+ * 7 work->current_func() {
+ * 8 LOAD event_indicated
+ * }
+ *
+ * Without an explicit full barrier speculative LOAD on line 8 can
+ * be executed before CPU#0 does STORE on line 1. If that happens,
+ * CPU#0 observes the PENDING bit is still set and new execution of
+ * a @work is not queued in a hope, that CPU#1 will eventually
+ * finish the queued @work. Meanwhile CPU#1 does not see
+ * event_indicated is set, because speculative LOAD was executed
+ * before actual STORE.
+ */
+ smp_mb();
}
static void clear_work_data(struct work_struct *work)
@@ -4447,6 +4476,17 @@ static void rebind_workers(struct worker_pool *pool)
pool->attrs->cpumask) < 0);
spin_lock_irq(&pool->lock);
+
+ /*
+ * XXX: CPU hotplug notifiers are weird and can call DOWN_FAILED
+ * w/o preceding DOWN_PREPARE. Work around it. CPU hotplug is
+ * being reworked and this can go away in time.
+ */
+ if (!(pool->flags & POOL_DISASSOCIATED)) {
+ spin_unlock_irq(&pool->lock);
+ return;
+ }
+
pool->flags &= ~POOL_DISASSOCIATED;
for_each_pool_worker(worker, pool) {