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| author | Sree Sesha Aravind Vadrevu <svadrevu@codeaurora.org> | 2014-06-13 13:13:32 -0700 |
|---|---|---|
| committer | David Keitel <dkeitel@codeaurora.org> | 2016-03-23 20:30:52 -0700 |
| commit | 5a63e87dd8c9f821bf31b981b26840e0ccf0a0a1 (patch) | |
| tree | efe1c043cafacfe7e81a0d99d819560a73f3fbe3 /kernel/sysctl_binary.c | |
| parent | 98fe6af44710b82dde86133474513d573e0eae37 (diff) | |
msm: mdss: Flush Interface timing registers only once
MDSS interface timing engine registers need to be flushed
only once during the first commit to the respective panel.
Change-Id: I7a619f2eeeb57baf5429346a11eb41eedac252f3
Signed-off-by: Sree Sesha Aravind Vadrevu <svadrevu@codeaurora.org>
Diffstat (limited to 'kernel/sysctl_binary.c')
0 files changed, 0 insertions, 0 deletions