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| author | Nicolas Ferre <nicolas.ferre@atmel.com> | 2015-03-04 15:17:23 +0100 |
|---|---|---|
| committer | Nicolas Ferre <nicolas.ferre@atmel.com> | 2015-03-04 15:17:23 +0100 |
| commit | e61b8370d7e4ef40194bc62d6e22f3c95f4a01ec (patch) | |
| tree | e595a3bcd32efb4901d7643e9ea4989242490892 /include | |
| parent | c517d838eb7d07bbe9507871fab3931deccff539 (diff) | |
| parent | 2141102e045e622cac176891cb66c5bf08e439f5 (diff) | |
Merge tag 'at91-fixes' into at91-4.1-dt
First fixes batch for AT91 on 4.0:
- PM slowclock fixes for DDR and timeouts
- fix some DT entries
- little defconfig updates
- the removal of a harmful watchdog option + its detailed documentation
Diffstat (limited to 'include')
| -rw-r--r-- | include/soc/at91/at91sam9_ddrsdr.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/include/soc/at91/at91sam9_ddrsdr.h b/include/soc/at91/at91sam9_ddrsdr.h index 0210797abf2e..dc10c52e0e91 100644 --- a/include/soc/at91/at91sam9_ddrsdr.h +++ b/include/soc/at91/at91sam9_ddrsdr.h @@ -92,7 +92,7 @@ #define AT91_DDRSDRC_UPD_MR (3 << 20) /* Update load mode register and extended mode register */ #define AT91_DDRSDRC_MDR 0x20 /* Memory Device Register */ -#define AT91_DDRSDRC_MD (3 << 0) /* Memory Device Type */ +#define AT91_DDRSDRC_MD (7 << 0) /* Memory Device Type */ #define AT91_DDRSDRC_MD_SDR 0 #define AT91_DDRSDRC_MD_LOW_POWER_SDR 1 #define AT91_DDRSDRC_MD_LOW_POWER_DDR 3 |