ARM: dts: qcom: Snapshot all device tree files for MSMCOBALT

Snapshot all device tree files from msm-3.18@b6a638f8795ee77ca
("Merge "msm: mdss: add support to send dcs cmds by
 left port only in video mode")

Change-Id: I631047dffa019c6d2ee731ead328d332f1c7f3b8
Signed-off-by: Abhimanyu Kapur <abhimany@codeaurora.org>

3 files changed, 192 insertions, 150 deletions

diff --git a/include/dt-bindings/clock/msm-clocks-cobalt.h b/include/dt-bindings/clock/msm-clocks-cobalt.h
index dd726d0d9b6c..73f4de84de8d 100644
--- a/include/dt-bindings/clock/msm-clocks-cobalt.h
+++ b/include/dt-bindings/clock/msm-clocks-cobalt.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2015-2016, The Linux Foundation. All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 and
@@ -271,24 +271,26 @@
 #define clk_gcc_debug_mux			0x8121ac15
 
 /* clock_mmss controlled clocks */
-#define clk_mmpll2				0x1190e4d8
-#define clk_mmpll3				0x18c76899
-#define clk_mmpll4				0x22c063c1
-#define clk_mmpll5				0xa41e1936
-#define clk_mmpll6				0xc56fb440
-#define clk_mmpll7				0x3ac216af
-#define clk_mmpll8				0xd06ad45e
-#define clk_mmpll9				0x1c50684c
-#define clk_mmpll10				0x2561263b
-#define clk_mmpll2_out_main			0x1e9e24a8
-#define clk_mmpll3_out_main			0x6eb6328f
-#define clk_mmpll4_out_main			0xfb21c2fd
-#define clk_mmpll5_out_main			0xcc1897bf
-#define clk_mmpll6_out_main			0xfb1060bd
-#define clk_mmpll7_out_main			0x767758ed
-#define clk_mmpll8_out_main			0x75b1f386
-#define clk_mmpll9_out_main			0x16b74937
-#define clk_mmpll10_out_main			0x3c5668f3
+#define clk_mmsscc_xo				0x05e63704
+#define clk_mmsscc_gpll0			0xe900c515
+#define clk_mmsscc_gpll0_div			0x73892e05
+#define clk_mmpll0_pll				0x361e3cfd
+#define clk_mmpll1_pll				0x198e426b
+#define clk_mmpll3_pll				0x18c76899
+#define clk_mmpll4_pll				0x22c063c1
+#define clk_mmpll5_pll				0xa41e1936
+#define clk_mmpll6_pll				0xc56fb440
+#define clk_mmpll7_pll				0x3ac216af
+#define clk_mmpll10_pll				0x2561263b
+#define clk_mmpll0_pll_out			0x1e9e24a8
+#define clk_mmpll1_pll_out			0x5fa32257
+#define clk_mmpll3_pll_out			0x6eb6328f
+#define clk_mmpll4_pll_out			0xfb21c2fd
+#define clk_mmpll5_pll_out			0xcc1897bf
+#define clk_mmpll6_pll_out			0xfb1060bd
+#define clk_mmpll7_pll_out			0x767758ed
+#define clk_mmpll10_pll_out			0x3c5668f3
+#define clk_ahb_clk_src				0x86f49203
 #define clk_csi0_clk_src			0x227e65bc
 #define clk_vfe0_clk_src			0xa0c2bd8f
 #define clk_vfe1_clk_src			0x4e357366
@@ -302,12 +304,11 @@
 #define clk_csi2_clk_src			0x4113589f
 #define clk_csi3_clk_src			0xfd934012
 #define clk_fd_core_clk_src			0xe4799ab7
-#define clk_dp_crypto_clk_src			0xf8faa811
-#define clk_dp_pixel_clk_src			0xf5dfbabf
+#define clk_ext_extpclk_clk_src			0xe5b273af
+#define clk_ext_pclk0_clk_src			0x087c1612
+#define clk_ext_pclk1_clk_src			0x8067c5a3
 #define clk_pclk0_clk_src			0xccac1f35
 #define clk_pclk1_clk_src			0x090f68ac
-#define clk_mmsscc_xo				0x05e63704
-#define clk_mmsscc_gpll0			0xe900c515
 #define clk_video_subcore0_clk_src		0x88d79636
 #define clk_video_subcore1_clk_src		0x4966930c
 #define clk_cci_clk_src				0x822f3d97
@@ -317,141 +318,119 @@
 #define clk_mclk1_clk_src			0xa73cad0c
 #define clk_mclk2_clk_src			0x42545468
 #define clk_mclk3_clk_src			0x2bfbb714
+#define clk_csiphy_clk_src			0x8cceb70a
 #define clk_csi0phytimer_clk_src		0xc8a309be
 #define clk_csi1phytimer_clk_src		0x7c0fe23a
 #define clk_csi2phytimer_clk_src		0x62ffea9c
+#define clk_ext_byte0_clk_src			0xfb32f31e
+#define clk_ext_byte1_clk_src			0x585ef6d4
 #define clk_byte0_clk_src			0x75cc885b
 #define clk_byte1_clk_src			0x63c2c955
 #define clk_dp_aux_clk_src			0x2b6e972b
 #define clk_dp_gtc_clk_src			0xc5a86a42
-#define clk_dp_link_clk_src			0x370d0626
 #define clk_esc0_clk_src			0xb41d7c38
 #define clk_esc1_clk_src			0x3b0afa42
 #define clk_extpclk_clk_src			0xb2c31abd
 #define clk_hdmi_clk_src			0xb40aeea9
 #define clk_vsync_clk_src			0xecb43940
-#define clk_bimc_smmu_ahb_clk			0x5b71f87d
-#define clk_bimc_smmu_axi_clk			0x49cfc61c
-#define clk_snoc_dvm_axi_clk			0x72bbd57a
-#define clk_bto_ahb_clk				0x3844ec63
-#define clk_camss_ahb_clk			0xc4ff91d4
-#define clk_camss_cci_ahb_clk			0x04c4441a
-#define clk_camss_cci_clk			0xd6cb5eb9
-#define clk_camss_cpp_ahb_clk			0x12e9a87b
-#define clk_camss_cpp_clk			0xb82f366b
-#define clk_camss_cpp_axi_clk			0x5598c804
-#define clk_camss_cpp_vbif_ahb_clk		0xb5f31be4
-#define clk_camss_cphy_csid0_clk		0x25706297
-#define clk_camss_csi0_ahb_clk			0x6e29c972
-#define clk_camss_csi0_clk			0x30862ddb
-#define clk_camss_csi0pix_clk			0x6946f77b
-#define clk_camss_csi0rdi_clk			0x83645ef5
-#define clk_camss_cphy_csid1_clk		0x0404b393
-#define clk_camss_csi1_ahb_clk			0xccc15f06
-#define clk_camss_csi1_clk			0xb150f052
-#define clk_camss_csi1pix_clk			0x58d19bf3
-#define clk_camss_csi1rdi_clk			0x4d2f3352
-#define clk_camss_cphy_csid2_clk		0xe9d0fe2f
-#define clk_camss_csi2_ahb_clk			0x92d02d75
-#define clk_camss_csi2_clk			0x74fc92e8
-#define clk_camss_csi2pix_clk			0xf8ed0731
-#define clk_camss_csi2rdi_clk			0xdc1b2081
-#define clk_camss_cphy_csid3_clk		0x4eccef6c
-#define clk_camss_csi3_ahb_clk			0xee5e459c
-#define clk_camss_csi3_clk			0x39488fdd
-#define clk_camss_csi3pix_clk			0xd82bd467
-#define clk_camss_csi3rdi_clk			0xb6750046
-#define clk_camss_csi_vfe0_clk			0x3023937a
-#define clk_camss_csi_vfe1_clk			0xe66fa522
-#define clk_camss_csiphy0_clk			0x6e1782f1
-#define clk_camss_csiphy1_clk			0x10d2e851
-#define clk_camss_csiphy2_clk			0x4c54acb5
-#define clk_fd_ahb_clk				0x868a2c5c
-#define clk_fd_core_clk				0x3badcae4
-#define clk_fd_core_uar_clk			0x7e624e15
-#define clk_camss_gp0_clk			0xcee7e51d
-#define clk_camss_gp1_clk			0x41f1c2e3
-#define clk_camss_ispif_ahb_clk			0x9a212c6d
-#define clk_camss_jpeg0_clk			0x0b0e2db7
-#define clk_camss_jpeg_ahb_clk			0x1f47fd28
-#define clk_camss_jpeg_axi_clk			0x9e5545c8
-#define clk_camss_mclk0_clk			0xcf0c61e0
-#define clk_camss_mclk1_clk			0xd1410ed4
-#define clk_camss_mclk2_clk			0x851286f2
-#define clk_camss_mclk3_clk			0x4db11c45
-#define clk_camss_micro_ahb_clk			0x33a23277
-#define clk_camss_csi0phytimer_clk		0xff93b3c8
-#define clk_camss_csi1phytimer_clk		0x6c399ab6
-#define clk_camss_csi2phytimer_clk		0x24f47f49
-#define clk_camss_top_ahb_clk			0x8f8b2d33
-#define clk_camss_vfe0_ahb_clk			0x4652833c
-#define clk_camss_vfe0_clk			0x1e9bb8c4
-#define clk_camss_vfe0_stream_clk		0x22835fa4
-#define clk_camss_vfe1_ahb_clk			0x6a56abd3
-#define clk_camss_vfe1_clk			0x5bffa69b
-#define clk_camss_vfe1_stream_clk		0x92f849b9
-#define clk_camss_vfe_vbif_ahb_clk		0x69b314cf
-#define clk_camss_vfe_vbif_axi_clk		0x37390d57
-#define clk_mdss_ahb_clk			0x684ccb41
-#define clk_mdss_axi_clk			0xcc07d687
-#define clk_mdss_byte0_clk			0xf5a03f64
-#define clk_mdss_byte0_intf_clk			0x78d77f37
-#define clk_mdss_byte1_clk			0xb8c7067d
-#define clk_mdss_byte1_intf_clk			0xca7f2082
-#define clk_mdss_dp_aux_clk			0xac5fd97c
-#define clk_mdss_dp_crypto_clk			0x3492537d
-#define clk_mdss_dp_gtc_clk			0x32341887
-#define clk_mdss_dp_link_clk			0xef31ea17
-#define clk_mdss_dp_link_intf_clk		0x960e00b8
-#define clk_mdss_dp_pixel_clk			0x0173b158
-#define clk_mdss_esc0_clk			0x28cafbe6
-#define clk_mdss_esc1_clk			0xc22c6883
-#define clk_mdss_extpclk_clk			0xfa5aadb0
-#define clk_mdss_hdmi_clk			0x097a6de9
-#define clk_mdss_hdmi_dp_ahb_clk		0x862fc1ba
-#define clk_mdss_mdp_clk			0x618336ac
-#define clk_mdss_pclk0_clk			0x3487234a
-#define clk_mdss_pclk1_clk			0xd5804246
-#define clk_mdss_rot_clk			0x954e31b8
-#define clk_mdss_vsync_clk			0x42a022d3
-#define clk_misc_ahb_clk			0xdfbd704c
-#define clk_misc_cxo_clk			0x012c041f
-#define clk_mnoc_maxi_clk			0x4def770c
-#define clk_spdm_ahb_clk			0xdfae8ed9
-#define clk_spdm_axi_clk			0x31ef53a3
-#define clk_spdm_cpp_clk			0x3f58e5f8
-#define clk_spdm_csi0_clk			0x5e537bc8
-#define clk_spdm_debug_clk			0xa850c7fb
-#define clk_spdm_dp_crypto_clk			0xdb01d21e
-#define clk_spdm_dp_pixel_clk			0x321dd909
-#define clk_spdm_jpeg0_clk			0x28f07f34
-#define clk_spdm_mdp_clk			0xafc15ea1
-#define clk_spdm_pclk0_clk			0x6d440ee3
-#define clk_spdm_pclk1_clk			0xb93af2ab
-#define clk_spdm_rot_clk			0x105c1345
-#define clk_spdm_vfe0_clk			0x64266893
-#define clk_spdm_vfe1_clk			0xdb738e6c
-#define clk_spdm_video_core_clk			0x76baf313
-#define clk_spdm_rm_axi_clk			0x3bac1b23
-#define clk_spdm_rm_maxi_clk			0xd5cf2f39
-#define clk_camss_micro_ahb_slp_stg_clk		0x51441764
-#define clk_throttle_camss_ahb_clk		0x5c3b3b21
-#define clk_throttle_camss_axi_clk		0xbaa23c28
-#define clk_throttle_camss_cxo_clk		0x93e27c3b
-#define clk_throttle_mdss_ahb_clk		0x8ae6585f
-#define clk_throttle_mdss_axi_clk		0xc7850107
-#define clk_throttle_mdss_cxo_clk		0xadb11a10
-#define clk_throttle_video_ahb_clk		0x5612a745
-#define clk_throttle_video_axi_clk		0x06c344d6
-#define clk_throttle_video_cxo_clk		0x808d592e
-#define clk_video_subcore0_clk			0xb6f63e6c
-#define clk_video_subcore1_clk			0x26c29cb4
-#define clk_video_ahb_clk			0x90775cfb
-#define clk_video_axi_clk			0xe6c16dba
-#define clk_video_core_clk			0x7e876ec3
-#define clk_video_maxi_clk			0x97749db6
-#define clk_vmem_ahb_clk			0xab6223ff
-#define clk_vmem_maxi_clk			0x15ef32db
+#define clk_mmss_bimc_smmu_ahb_clk		0x4825baf4
+#define clk_mmss_bimc_smmu_axi_clk		0xc365ac39
+#define clk_mmss_snoc_dvm_axi_clk		0x2c159a11
+#define clk_mmss_camss_ahb_clk			0xa51f2c1d
+#define clk_mmss_camss_cci_ahb_clk		0xfda8bb6a
+#define clk_mmss_camss_cci_clk			0x71bb5c97
+#define clk_mmss_camss_cpp_ahb_clk		0xd5554f15
+#define clk_mmss_camss_cpp_clk			0x8e99ef57
+#define clk_mmss_camss_cpp_axi_clk		0xd84e390b
+#define clk_mmss_camss_cpp_vbif_ahb_clk		0x1b33a88e
+#define clk_mmss_camss_cphy_csid0_clk		0x56114361
+#define clk_mmss_camss_csi0_ahb_clk		0x2b58d241
+#define clk_mmss_camss_csi0_clk			0xccfe39ef
+#define clk_mmss_camss_csi0pix_clk		0x9e26509d
+#define clk_mmss_camss_csi0rdi_clk		0x01d5bf83
+#define clk_mmss_camss_cphy_csid1_clk		0x79fbcd8a
+#define clk_mmss_camss_csi1_ahb_clk		0x7073244b
+#define clk_mmss_camss_csi1_clk			0x3eeeaac0
+#define clk_mmss_camss_csi1pix_clk		0xf1375139
+#define clk_mmss_camss_csi1rdi_clk		0x43185024
+#define clk_mmss_camss_cphy_csid2_clk		0xf295e3ef
+#define clk_mmss_camss_csi2_ahb_clk		0x681c1479
+#define clk_mmss_camss_csi2_clk			0x94524569
+#define clk_mmss_camss_csi2pix_clk		0xf4de617d
+#define clk_mmss_camss_csi2rdi_clk		0x4bf01dc5
+#define clk_mmss_camss_cphy_csid3_clk		0x100188e9
+#define clk_mmss_camss_csi3_ahb_clk		0xfae7c29b
+#define clk_mmss_camss_csi3_clk			0x55e4bbae
+#define clk_mmss_camss_csi3pix_clk		0xc166a015
+#define clk_mmss_camss_csi3rdi_clk		0x6983a4cd
+#define clk_mmss_camss_csi_vfe0_clk		0x3b30b798
+#define clk_mmss_camss_csi_vfe1_clk		0xfe729af7
+#define clk_mmss_camss_csiphy0_clk		0x96c81af8
+#define clk_mmss_camss_csiphy1_clk		0xee9ac2bb
+#define clk_mmss_camss_csiphy2_clk		0x3365e70e
+#define clk_mmss_fd_ahb_clk			0x4ff1da4d
+#define clk_mmss_fd_core_clk			0x749e7eb0
+#define clk_mmss_fd_core_uar_clk		0x8ea480c5
+#define clk_mmss_camss_gp0_clk			0x3f7f6c87
+#define clk_mmss_camss_gp1_clk			0xdccdd730
+#define clk_mmss_camss_ispif_ahb_clk		0xbda4f0e3
+#define clk_mmss_camss_jpeg0_clk		0x4cc73b07
+#define clk_mmss_camss_jpeg_ahb_clk		0xde1fece3
+#define clk_mmss_camss_jpeg_axi_clk		0x7534616b
+#define clk_mmss_camss_mclk0_clk		0x056293a7
+#define clk_mmss_camss_mclk1_clk		0x96c7b69b
+#define clk_mmss_camss_mclk2_clk		0x8820556e
+#define clk_mmss_camss_mclk3_clk		0xf90ffb67
+#define clk_mmss_camss_micro_ahb_clk		0x6c6fd3c7
+#define clk_mmss_camss_csi0phytimer_clk		0x7a78864e
+#define clk_mmss_camss_csi1phytimer_clk		0x6e6c1de5
+#define clk_mmss_camss_csi2phytimer_clk		0x0235e2de
+#define clk_mmss_camss_top_ahb_clk		0x120618d6
+#define clk_mmss_camss_vfe0_ahb_clk		0x137bd0bd
+#define clk_mmss_camss_vfe0_clk			0xead28288
+#define clk_mmss_camss_vfe0_stream_clk		0xa0428287
+#define clk_mmss_camss_vfe1_ahb_clk		0xac0154c0
+#define clk_mmss_camss_vfe1_clk			0xc216b14d
+#define clk_mmss_camss_vfe1_stream_clk		0x745af3b6
+#define clk_mmss_camss_vfe_vbif_ahb_clk		0x0109a9c6
+#define clk_mmss_camss_vfe_vbif_axi_clk		0xe626d8a1
+#define clk_mmss_mdss_ahb_clk			0x85d37ab5
+#define clk_mmss_mdss_axi_clk			0xdf04fc1d
+#define clk_mmss_mdss_byte0_clk			0x38105d25
+#define clk_mmss_mdss_byte1_clk			0xe0c21354
+#define clk_mmss_mdss_dp_aux_clk		0x23125eb6
+#define clk_mmss_mdss_dp_gtc_clk		0xb59c151a
+#define clk_mmss_mdss_esc0_clk			0x5721ff83
+#define clk_mmss_mdss_esc1_clk			0xc3d0376b
+#define clk_mmss_mdss_extpclk_clk		0x74d5a954
+#define clk_mmss_mdss_hdmi_clk			0x28460a6d
+#define clk_mmss_mdss_hdmi_dp_ahb_clk		0x5448519f
+#define clk_mmss_mdss_mdp_clk			0x43539b0e
+#define clk_mmss_mdss_pclk0_clk			0xcc0e909d
+#define clk_mmss_mdss_pclk1_clk			0x850d9146
+#define clk_mmss_mdss_rot_clk			0xbb7e71c4
+#define clk_mmss_mdss_vsync_clk			0x629b36dc
+#define clk_mmss_misc_ahb_clk			0xea30b0e7
+#define clk_mmss_misc_cxo_clk			0xe620cd80
+#define clk_mmss_mnoc_ahb_clk			0x49a394f4
+#define clk_mmss_mnoc_maxi_clk			0xd8b7278f
+#define clk_mmss_throttle_camss_ahb_clk		0x0382ef47
+#define clk_mmss_throttle_camss_axi_clk		0x26271bf4
+#define clk_mmss_throttle_camss_cxo_clk		0xa3d15f10
+#define clk_mmss_throttle_mdss_ahb_clk		0x1ab259f7
+#define clk_mmss_throttle_mdss_axi_clk		0x80067438
+#define clk_mmss_throttle_mdss_cxo_clk		0x8a8daaf7
+#define clk_mmss_throttle_video_ahb_clk		0x9efb223e
+#define clk_mmss_throttle_video_axi_clk		0xe160287c
+#define clk_mmss_throttle_video_cxo_clk		0x7aa7d641
+#define clk_mmss_video_subcore0_clk		0x23fae359
+#define clk_mmss_video_subcore1_clk		0x5213a0c7
+#define clk_mmss_video_ahb_clk			0x94334ae9
+#define clk_mmss_video_axi_clk			0xf3178ba5
+#define clk_mmss_video_core_clk			0x78f14c85
+#define clk_mmss_video_maxi_clk			0x1785ef88
+#define clk_mmss_vmem_ahb_clk			0x4b18955b
+#define clk_mmss_vmem_maxi_clk			0xb6067889
 #define clk_mmss_debug_mux			0xe646ffda
 
 /* clock_gpu controlled clocks*/
diff --git a/include/dt-bindings/msm/msm-bus-ids.h b/include/dt-bindings/msm/msm-bus-ids.h
index 37f8fb8ca575..f7139500e866 100644
--- a/include/dt-bindings/msm/msm-bus-ids.h
+++ b/include/dt-bindings/msm/msm-bus-ids.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2014-2015, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2014-2016, The Linux Foundation. All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 and
@@ -37,6 +37,8 @@
 #define	MSM_BUS_FAB_A0_NOC 6145
 #define	MSM_BUS_FAB_A1_NOC 6146
 #define	MSM_BUS_FAB_A2_NOC 6147
+#define	MSM_BUS_FAB_GNOC 6148
+#define	MSM_BUS_FAB_CR_VIRT 6149
 
 #define	MSM_BUS_MASTER_FIRST 1
 #define	MSM_BUS_MASTER_AMPSS_M0 1
@@ -155,7 +157,12 @@
 #define	MSM_BUS_MASTER_XI_USB_HSIC  113
 #define	MSM_BUS_MASTER_SGMII	    114
 #define	MSM_BUS_SPMI_FETCHER 115
-#define	MSM_BUS_MASTER_LAST 116
+#define	MSM_BUS_MASTER_GNOC_BIMC 116
+#define	MSM_BUS_MASTER_CRVIRT_A2NOC 117
+#define	MSM_BUS_MASTER_CNOC_A2NOC 118
+#define	MSM_BUS_MASTER_WLAN 119
+#define	MSM_BUS_MASTER_MSS_CE 120
+#define	MSM_BUS_MASTER_MASTER_LAST 121
 
 #define	MSM_BUS_SYSTEM_FPB_MASTER_SYSTEM MSM_BUS_SYSTEM_MASTER_SYSTEM_FPB
 #define	MSM_BUS_CPSS_FPB_MASTER_SYSTEM MSM_BUS_SYSTEM_MASTER_CPSS_FPB
@@ -443,8 +450,20 @@
 #define	MSM_BUS_SLAVE_PCNOC_BIMC_1 718
 #define	MSM_BUS_SLAVE_SGMII 719
 #define	MSM_BUS_SLAVE_SPMI_FETCHER 720
-#define	MSM_BUS_PNOC_SLV_6	721
-#define	MSM_BUS_SLAVE_LAST 722
+#define	MSM_BUS_PNOC_SLV_6 721
+#define	MSM_BUS_SLAVE_MMSS_SMMU_CFG 722
+#define	MSM_BUS_SLAVE_WLAN 723
+#define	MSM_BUS_SLAVE_CRVIRT_A2NOC 724
+#define	MSM_BUS_SLAVE_CNOC_A2NOC 725
+#define	MSM_BUS_SLAVE_GLM 726
+#define	MSM_BUS_SLAVE_GNOC_BIMC 727
+#define	MSM_BUS_SLAVE_GNOC_SNOC 728
+#define	MSM_BUS_SLAVE_QM_CFG 729
+#define	MSM_BUS_SLAVE_TLMM_EAST 730
+#define	MSM_BUS_SLAVE_TLMM_NORTH 731
+#define	MSM_BUS_SLAVE_TLMM_WEST 732
+#define	MSM_BUS_SLAVE_SKL 733
+#define	MSM_BUS_SLAVE_LAST 734
 
 #define	MSM_BUS_SYSTEM_FPB_SLAVE_SYSTEM  MSM_BUS_SYSTEM_SLAVE_SYSTEM_FPB
 #define	MSM_BUS_CPSS_FPB_SLAVE_SYSTEM MSM_BUS_SYSTEM_SLAVE_CPSS_FPB
@@ -609,6 +628,11 @@
 #define	ICBID_MASTER_XI_HSIC 141
 #define	ICBID_MASTER_SGMII  142
 #define	ICBID_MASTER_SPMI_FETCHER 143
+#define	ICBID_MASTER_GNOC_BIMC 144
+#define	ICBID_MASTER_CRVIRT_A2NOC 145
+#define	ICBID_MASTER_CNOC_A2NOC 146
+#define	ICBID_MASTER_WLAN 147
+#define	ICBID_MASTER_MSS_CE 148
 
 #define	ICBID_SLAVE_EBI1 0
 #define	ICBID_SLAVE_APPSS_L2 1
@@ -826,4 +850,15 @@
 #define	ICBID_SLAVE_BIMC_PCNOC   202
 #define	ICBID_SLAVE_PCNOC_BIMC_1 203
 #define	ICBID_SLAVE_SPMI_FETCHER 204
+#define	ICBID_SLAVE_MMSS_SMMU_CFG 205
+#define	ICBID_SLAVE_WLAN 206
+#define	ICBID_SLAVE_CRVIRT_A2NOC 207
+#define	ICBID_SLAVE_CNOC_A2NOC 208
+#define	ICBID_SLAVE_GLM 209
+#define	ICBID_SLAVE_GNOC_BIMC 210
+#define	ICBID_SLAVE_GNOC_SNOC 211
+#define	ICBID_SLAVE_QM_CFG 212
+#define	ICBID_SLAVE_TLMM_EAST 213
+#define	ICBID_SLAVE_TLMM_NORTH 214
+#define	ICBID_SLAVE_TLMM_WEST 215
 #endif
diff --git a/include/dt-bindings/regulator/qcom,rpm-smd-regulator.h b/include/dt-bindings/regulator/qcom,rpm-smd-regulator.h
new file mode 100644
index 000000000000..cd38c026f815
--- /dev/null
+++ b/include/dt-bindings/regulator/qcom,rpm-smd-regulator.h
@@ -0,0 +1,28 @@
+/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __QCOM_RPM_SMD_REGULATOR_H
+#define __QCOM_RPM_SMD_REGULATOR_H
+
+#define RPM_SMD_REGULATOR_LEVEL_NONE		0
+#define RPM_SMD_REGULATOR_LEVEL_RETENTION	16
+#define RPM_SMD_REGULATOR_LEVEL_RETENTION_PLUS	32
+#define RPM_SMD_REGULATOR_LEVEL_MIN_SVS		48
+#define RPM_SMD_REGULATOR_LEVEL_LOW_SVS		64
+#define RPM_SMD_REGULATOR_LEVEL_SVS		128
+#define RPM_SMD_REGULATOR_LEVEL_SVS_PLUS	192
+#define RPM_SMD_REGULATOR_LEVEL_NOM		256
+#define RPM_SMD_REGULATOR_LEVEL_NOM_PLUS	320
+#define RPM_SMD_REGULATOR_LEVEL_TURBO		384
+#define RPM_SMD_REGULATOR_LEVEL_BINNING		512
+
+#endif