diff options
| author | Dave Airlie <airlied@redhat.com> | 2011-03-03 12:00:52 +1000 |
|---|---|---|
| committer | Dave Airlie <airlied@redhat.com> | 2011-03-03 12:00:52 +1000 |
| commit | ba77a26cb570f8b506bcb7991b1e154b8bd38914 (patch) | |
| tree | 5491e3ed0b5cf407cf1b28e4d7af862cde8735fe /include | |
| parent | 486af1896f3a4a388410215c5a2014b9d09a79f5 (diff) | |
| parent | 64bc5524906e31c1144af29ba50c585afe333bb3 (diff) | |
Merge remote branch 'korg/drm-radeon-cayman' into drm-core-next
* korg/drm-radeon-cayman:
drm/radeon/kms: add cayman pci ids
drm/radeon/kms: cayman/evergreen cs checker updates
drm/radeon/kms/cayman: always set certain VGT regs at CP init
drm/radeon/kms: additional default context regs for cayman
drm/radeon/kms: add cayman CS check support
drm/radeon/kms: add radeon_asic entry for cayman
drm/radeon/kms: add cayman safe regs
drm/radeon/kms/cayman: add asic init/startup/fini/suspend/resume functions
drm/radeon/kms: add cayman asic reset support
drm/radeon/kms: add support for cayman irqs
drm/radeon/kms: add support for CP setup on cayman asics
drm/radeon/kms: add support for cayman gart setup
drm/radeon/kms: add gpu_init function for cayman
drm/radeon/kms: add ucode loader for cayman
drm/radeon/kms: add cayman chip family
Diffstat (limited to 'include')
| -rw-r--r-- | include/drm/drm_pciids.h | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/include/drm/drm_pciids.h b/include/drm/drm_pciids.h index 5ff1194dc2ea..820ee9029482 100644 --- a/include/drm/drm_pciids.h +++ b/include/drm/drm_pciids.h @@ -141,6 +141,20 @@ {0x1002, 0x5e4c, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|RADEON_NEW_MEMMAP}, \ {0x1002, 0x5e4d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|RADEON_NEW_MEMMAP}, \ {0x1002, 0x5e4f, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|RADEON_NEW_MEMMAP}, \ + {0x1002, 0x6700, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAYMAN|RADEON_NEW_MEMMAP}, \ + {0x1002, 0x6701, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAYMAN|RADEON_NEW_MEMMAP}, \ + {0x1002, 0x6702, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAYMAN|RADEON_NEW_MEMMAP}, \ + {0x1002, 0x6703, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAYMAN|RADEON_NEW_MEMMAP}, \ + {0x1002, 0x6704, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAYMAN|RADEON_NEW_MEMMAP}, \ + {0x1002, 0x6705, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAYMAN|RADEON_NEW_MEMMAP}, \ + {0x1002, 0x6706, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAYMAN|RADEON_NEW_MEMMAP}, \ + {0x1002, 0x6707, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAYMAN|RADEON_NEW_MEMMAP}, \ + {0x1002, 0x6708, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAYMAN|RADEON_NEW_MEMMAP}, \ + {0x1002, 0x6709, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAYMAN|RADEON_NEW_MEMMAP}, \ + {0x1002, 0x6718, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAYMAN|RADEON_NEW_MEMMAP}, \ + {0x1002, 0x6719, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAYMAN|RADEON_NEW_MEMMAP}, \ + {0x1002, 0x671c, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAYMAN|RADEON_NEW_MEMMAP}, \ + {0x1002, 0x671d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_CAYMAN|RADEON_NEW_MEMMAP}, \ {0x1002, 0x6720, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BARTS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ {0x1002, 0x6721, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BARTS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \ {0x1002, 0x6722, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_BARTS|RADEON_NEW_MEMMAP}, \ |