diff options
| author | Adam Honse <calcprogrammer1@gmail.com> | 2020-04-10 15:48:44 -0500 |
|---|---|---|
| committer | Sasha Levin <sashal@kernel.org> | 2020-06-29 20:07:48 -0400 |
| commit | adcd53860d5bf1c19e209079b7e3b371666b7398 (patch) | |
| tree | a96cf2293019b370140dba42a6aa07718be8f0b8 /include | |
| parent | 55597918d5226ac2f2c8c235e270c79b846c415f (diff) | |
i2c: piix4: Detect secondary SMBus controller on AMD AM4 chipsets
[ Upstream commit f27237c174fd9653033330e4e532cd9d153ce824 ]
The AMD X370 and other AM4 chipsets (A/B/X 3/4/5 parts) and Threadripper
equivalents have a secondary SMBus controller at I/O port address
0x0B20. This bus is used by several manufacturers to control
motherboard RGB lighting via embedded controllers. I have been using
this bus in my OpenRGB project to control the Aura RGB on many
motherboards and ASRock also uses this bus for their Polychrome RGB
controller.
I am not aware of any CZ-compatible platforms which do not have the
second SMBus channel. All of AMD's AM4- and Threadripper- series
chipsets that OpenRGB users have tested appear to have this secondary
bus. I also noticed this secondary bus is present on older AMD
platforms including my FM1 home server.
Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=202587
Signed-off-by: Adam Honse <calcprogrammer1@gmail.com>
Reviewed-by: Jean Delvare <jdelvare@suse.de>
Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Tested-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Signed-off-by: Sasha Levin <sashal@kernel.org>
Diffstat (limited to 'include')
0 files changed, 0 insertions, 0 deletions
