Promotion of kernel.lnx.4.4-161124.1.

CRs      Change ID                                   Subject
--------------------------------------------------------------------------------------------------------------
1090535   Ib1fdb0454c6e1d770ea6ec11a6032f8553d56c06   ARM: dts: msm: change UFS/SDHC2 power supply for msmcoba
1078936   I24f0958f97ca04916b8c6845f3122732e1928e6c   [media] xc2028: avoid use after free
1088324   I2e8ffab214106c01557446e00dbebe2cc2a52bd1   ARM: dts: msm: Add venus device nodes for starlord
1087922   Iec536bcdf4ed95e3d796324fd8bf5df259b340b0   cfg80211: validate beacon int as part of iface combinati
1091347   I9d180e4aedb17692eb2e48f98461239d29bbf975   clk: qcom: Add set_flags ops for the clk_gate2_ops
1091186   Ica381b0b73bd59a10ac8fd876bda5c21678dfddb   defconfig: msm: Add support for GPUCC clocks
1087922   I2f38b8ba1ddbe6041a4189f5d9b72c982f0fb367   cfg80211: make wdev_list accessible to drivers
1078921   I02fda1eb5173f5cf4db999147c623720892da529   block: fix use-after-free in sys_ioprio_get()
1092432   Ifd9f97f8595daac67c733e6120cdb3c89e5a02a4   ARM: dts: msm: Add RTB support for msmfalcon
1093492   Id30415ce0ea73012125ced35771b9aae9f941c22   msm: kgsl: Add support for A512 GPU
1092432   I6d55bf454cd629cd4894b60e40e9266d7e8b5bb9   ARM: dts: msm: Add RTB support for msmtriton
1092430   I32fb4c9a9be83a4448754bffde798432e417b17c   ARM: dts: msm: Add mpm2-sleep-counter device for msmfalc
633497   I3e43b8a704367aff7fe8dd88159315aef811c51c   USB: gagget: f_fs: Return error if TX req is queued duri
1078950   Idc6b27fb0b73b9057541ecc02c6c2aac46b50ffc   tty: Prevent ldisc drivers from re-using stale tty field
1078959   I0fa3cd8d4a0d9ea76d085bba6020f1eda073c09b   cgroup: prefer %pK to %p
959695   I57aa3e8b4987cb1adf9fad514a1fd1e84d44ac3f   msm: vidc: Update mbs per second calculation
1091194   I96406588062da4997851eff8524c53699f1063eb   ASoC: msm: Update supported sample rates for USB Backend
1092561   I13258295e9ae9c8607586ed5686e97276823d08c   clk: qcom: Add support for rf clk1 for msmfalcon
1087922   I282300533dcd80f65c9ba366246d028a6130ffff   cfg80211: identically validate beacon interval for AP/ME
1092425   I97a28cccc0494ea5ff45ccade9721da0c85edef7   ARM: dts: msm: add perf-events support for msmfalcon and
1090894   I42978f2230e95456e4b4e932365e5b2c83445f56   msm: gsi: fix interrupt processing
1086284   I8043a13d366fcb20a8a819c4739177258ad508ac   msm: vidc: fix mutex lock issue
1086805   Id92eabf03c8dace1c0ff801504b8591e9121782d   msm: sde: Correct max downscale factor for SDE rotator
1091186   If3c707877f2a0da04065b57a1c2fd44d256a5303   ARM: dts: msm: Update clock gfx node for MSMfalcon/Trito
1091731   I9c751d777d8402cdea3cdfb27da1a19a98a250e2   ARM: dts: msm: add charger/fg device nodes for PMFALCON
1087922   Ib1ae7221291b8176d61d58e756a3814c80d98d27   cfg80211: fix beacon interval in interface combination i
1072607   If8aa0b094af5ff82fe66c95e3ef2f13632950d2e   clk: qcom: Add support for MMCC clock for MSMFalcon
1078951   I3b04131079a27f0b1cd60df03c793e8d9ffe5e91   HID: core: prevent out-of-bound readings
1092428   Ic72005ca76ceea377154e4b11dceccd7c8dc5ab5   ARM: dts: msm: Add restart node and imem entries for msm
1081961   I242158975f212426268fd6eaf45378826d56d094   clk: qcom: Add snapshot of OSM CPU clock driver
1078920   Ia3c791c6cf81a6c156561106230cbf5e8dfad0bc   block: fix use-after-free in seq file
1091110   I4f8070e7fd0aa39664208cfab2448b5a95ab2326   ARM: dts: msm: Add DT for mediabox variant of apqcobalt
1078915   Iba5975e360eb2b2729b6f958b7cb00bfc469e51b   tcp: fix use after free in tcp_xmit_retransmit_queue()
1078960   Id91de0fcfc4a94f0c6282b59f96cea7cd0fea64c   netfilter: nfnetlink: correctly validate length of batch
1077422   Ideeaa89f15b8895ce7256fed9f614d5c39ef105f   msm: ipa: add api for getting IPA pdev
1093029   I2e657f3237c7ed38111b7bc6bddbf07ef4420924   arm: qcom: correct description for MSMTRITON and MSMFALC
1086284   Id158e5c6d89fc8b761d8cfe92afbf3592877c556   msm: vidc: fix the interrupt miss issue from video hardw
1092430   I2c8ffe10b650777f6c0b697c33e958300c9dbe66   ARM: dts: msm: Add mpm2-sleep-counter device for msmtrit
1092428   I48e84889b0867d98d70056eecae07becebae4c00   ARM: dts: msm: Add restart node and imem entries for msm
1087798   I7e3655be5c3ea0800499cf24c05899f3d518bbd6   msm: vidc: parse 10-bit bus entries for msmfalcon

Change-Id: I634056c9eabd17bcc5ecbf0617d988585be6535a
CRs-Fixed: 1090894, 1091110, 1078959, 1078951, 1078950, 1092428, 1081961, 1092425, 1091731, 1091186, 1087922, 633497, 1090535, 1078920, 959695, 1072607, 1078960, 1086805, 1092430, 1092432, 1091347, 1086284, 1093492, 1092561, 1087798, 1077422, 1093029, 1078915, 1078921, 1078936, 1091194, 1088324

3 files changed, 53 insertions, 48 deletions

diff --git a/include/dt-bindings/clock/qcom,mmcc-msmfalcon.h b/include/dt-bindings/clock/qcom,mmcc-msmfalcon.h
index ffb80a128dd6..7a6ec2bf2418 100644
--- a/include/dt-bindings/clock/qcom,mmcc-msmfalcon.h
+++ b/include/dt-bindings/clock/qcom,mmcc-msmfalcon.h
@@ -159,46 +159,47 @@
 #define MMSS_MDSS_AXI_CLK                        142
 #define MMSS_MDSS_BYTE0_CLK                      143
 #define MMSS_MDSS_BYTE0_INTF_CLK                 144
-#define MMSS_MDSS_BYTE1_CLK                      145
-#define MMSS_MDSS_BYTE1_INTF_CLK                 146
-#define MMSS_MDSS_DP_AUX_CLK                     147
-#define MMSS_MDSS_DP_CRYPTO_CLK                  148
-#define MMSS_MDSS_DP_GTC_CLK                     149
-#define MMSS_MDSS_DP_LINK_CLK                    150
-#define MMSS_MDSS_DP_LINK_INTF_CLK               151
-#define MMSS_MDSS_DP_PIXEL_CLK                   152
-#define MMSS_MDSS_ESC0_CLK                       153
-#define MMSS_MDSS_ESC1_CLK                       154
-#define MMSS_MDSS_HDMI_DP_AHB_CLK                155
-#define MMSS_MDSS_MDP_CLK                        156
-#define MMSS_MDSS_PCLK0_CLK                      157
-#define MMSS_MDSS_PCLK1_CLK                      158
-#define MMSS_MDSS_ROT_CLK                        159
-#define MMSS_MDSS_VSYNC_CLK                      160
-#define MMSS_MISC_AHB_CLK                        161
-#define MMSS_MISC_CXO_CLK                        162
-#define MMSS_MNOC_AHB_CLK                        163
-#define MMSS_SNOC_DVM_AXI_CLK                    164
-#define MMSS_THROTTLE_CAMSS_AHB_CLK              165
-#define MMSS_THROTTLE_CAMSS_AXI_CLK              166
-#define MMSS_THROTTLE_CAMSS_CXO_CLK              167
-#define MMSS_THROTTLE_MDSS_AHB_CLK               168
-#define MMSS_THROTTLE_MDSS_AXI_CLK               169
-#define MMSS_THROTTLE_MDSS_CXO_CLK               170
-#define MMSS_THROTTLE_VIDEO_AHB_CLK              171
-#define MMSS_THROTTLE_VIDEO_AXI_CLK              172
-#define MMSS_THROTTLE_VIDEO_CXO_CLK              173
-#define MMSS_VIDEO_AHB_CLK                       174
-#define MMSS_VIDEO_AXI_CLK                       175
-#define MMSS_VIDEO_CORE_CLK                      176
-#define MMSS_VIDEO_SUBCORE0_CLK                  177
-#define PCLK0_CLK_SRC                            178
-#define PCLK1_CLK_SRC                            179
-#define ROT_CLK_SRC                              180
-#define VFE0_CLK_SRC                             181
-#define VFE1_CLK_SRC                             182
-#define VIDEO_CORE_CLK_SRC                       183
-#define VSYNC_CLK_SRC                            184
+#define MMSS_MDSS_BYTE0_INTF_DIV_CLK             145
+#define MMSS_MDSS_BYTE1_CLK                      146
+#define MMSS_MDSS_BYTE1_INTF_CLK                 147
+#define MMSS_MDSS_DP_AUX_CLK                     148
+#define MMSS_MDSS_DP_CRYPTO_CLK                  149
+#define MMSS_MDSS_DP_GTC_CLK                     150
+#define MMSS_MDSS_DP_LINK_CLK                    151
+#define MMSS_MDSS_DP_LINK_INTF_CLK               152
+#define MMSS_MDSS_DP_PIXEL_CLK                   153
+#define MMSS_MDSS_ESC0_CLK                       154
+#define MMSS_MDSS_ESC1_CLK                       155
+#define MMSS_MDSS_HDMI_DP_AHB_CLK                156
+#define MMSS_MDSS_MDP_CLK                        157
+#define MMSS_MDSS_PCLK0_CLK                      158
+#define MMSS_MDSS_PCLK1_CLK                      159
+#define MMSS_MDSS_ROT_CLK                        160
+#define MMSS_MDSS_VSYNC_CLK                      161
+#define MMSS_MISC_AHB_CLK                        162
+#define MMSS_MISC_CXO_CLK                        163
+#define MMSS_MNOC_AHB_CLK                        164
+#define MMSS_SNOC_DVM_AXI_CLK                    165
+#define MMSS_THROTTLE_CAMSS_AHB_CLK              166
+#define MMSS_THROTTLE_CAMSS_AXI_CLK              167
+#define MMSS_THROTTLE_CAMSS_CXO_CLK              168
+#define MMSS_THROTTLE_MDSS_AHB_CLK               169
+#define MMSS_THROTTLE_MDSS_AXI_CLK               170
+#define MMSS_THROTTLE_MDSS_CXO_CLK               171
+#define MMSS_THROTTLE_VIDEO_AHB_CLK              172
+#define MMSS_THROTTLE_VIDEO_AXI_CLK              173
+#define MMSS_THROTTLE_VIDEO_CXO_CLK              174
+#define MMSS_VIDEO_AHB_CLK                       175
+#define MMSS_VIDEO_AXI_CLK                       176
+#define MMSS_VIDEO_CORE_CLK                      177
+#define MMSS_VIDEO_SUBCORE0_CLK                  178
+#define PCLK0_CLK_SRC                            179
+#define PCLK1_CLK_SRC                            180
+#define ROT_CLK_SRC                              181
+#define VFE0_CLK_SRC                             182
+#define VFE1_CLK_SRC                             183
+#define VIDEO_CORE_CLK_SRC                       184
+#define VSYNC_CLK_SRC                            185
 
 #define BIMC_SMMU_GDSC                           0
 #define CAMSS_CPP_GDSC                           1
@@ -209,5 +210,6 @@
 #define VIDEO_SUBCORE0_GDSC                      6
 #define VIDEO_TOP_GDSC                           7
 
+#define CAMSS_MICRO_BCR				 0
 
 #endif
diff --git a/include/net/cfg80211.h b/include/net/cfg80211.h
index b89c9c2f7f6e..cc1e8d6b3454 100644
--- a/include/net/cfg80211.h
+++ b/include/net/cfg80211.h
@@ -796,19 +796,15 @@ struct cfg80211_csa_settings {
  * @iftype_num: array with the number of interfaces of each interface
  *	type.  The index is the interface type as specified in &enum
  *	nl80211_iftype.
- * @beacon_int_gcd: a value specifying GCD of all beaconing interfaces,
- *	the GCD of a single value is considered the value itself, so for
- *	a single interface this should be set to that interface's beacon
- *	interval
- * @beacon_int_different: a flag indicating whether or not all beacon
- *	intervals (of beaconing interfaces) are different or not.
+ * @new_beacon_int: set this to the beacon interval of a new interface
+ *	that's not operating yet, if such is to be checked as part of
+ *	the verification
  */
 struct iface_combination_params {
 	int num_different_channels;
 	u8 radar_detect;
 	int iftype_num[NUM_NL80211_IFTYPES];
-	u32 beacon_int_gcd;
-	bool beacon_int_different;
+	u32 new_beacon_int;
 };
 
 /**
@@ -3219,6 +3215,9 @@ struct wiphy_iftype_ext_capab {
  * @vht_capa_mod_mask:  Specify what VHT capabilities can be over-ridden.
  *	If null, then none can be over-ridden.
  *
+ * @wdev_list: the list of associated (virtual) interfaces; this list must
+ *	not be modified by the driver, but can be read with RTNL/RCU protection.
+ *
  * @max_acl_mac_addrs: Maximum number of MAC addresses that the device
  *	supports for ACL.
  *
@@ -3363,6 +3362,8 @@ struct wiphy {
 	const struct ieee80211_ht_cap *ht_capa_mod_mask;
 	const struct ieee80211_vht_cap *vht_capa_mod_mask;
 
+	struct list_head wdev_list;
+
 	/* the network namespace this phy lives in currently */
 	possible_net_t _net;
 
diff --git a/include/net/tcp.h b/include/net/tcp.h
index 213601d620e0..52402ab90c57 100644
--- a/include/net/tcp.h
+++ b/include/net/tcp.h
@@ -1528,6 +1528,8 @@ static inline void tcp_check_send_head(struct sock *sk, struct sk_buff *skb_unli
 {
 	if (sk->sk_send_head == skb_unlinked)
 		sk->sk_send_head = NULL;
+	if (tcp_sk(sk)->highest_sack == skb_unlinked)
+		tcp_sk(sk)->highest_sack = NULL;
 }
 
 static inline void tcp_init_send_head(struct sock *sk)