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| author | Chandan Uddaraju <chandanu@codeaurora.org> | 2013-09-12 10:17:41 -0700 |
|---|---|---|
| committer | David Keitel <dkeitel@codeaurora.org> | 2016-03-23 20:25:52 -0700 |
| commit | 97ab5f3924d737a9a32f33aaaece4cfea3e6aae3 (patch) | |
| tree | 1051d9e89a87004cbb9ddff6ece3ad2dafa888e2 /include | |
| parent | a2b564c46907739d26e9822f66a5e2efc9fcf1af (diff) | |
msm: mdss: dsi-1 as master clock controller at split display case
During split display case, both dsi controllers share the same
dsi pll(dsi0) dsi-0 clock need to be enabled before dsi-1 and disabled
in the reverse order. This mechanism helps using a unified clock control
logic.
Change-Id: I9fe0095b0427c9c2b7fd84c3179bc8364049cce4
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
Signed-off-by: Siddhartha Agrawal <agrawals@codeaurora.org>
Diffstat (limited to 'include')
0 files changed, 0 insertions, 0 deletions