diff options
| author | Linux Build Service Account <lnxbuild@localhost> | 2017-01-10 12:27:05 -0800 |
|---|---|---|
| committer | Gerrit - the friendly Code Review server <code-review@localhost> | 2017-01-10 12:27:05 -0800 |
| commit | 8bfd4fdbf30da2dc59faa5a6b69d6862bc7078db (patch) | |
| tree | 849afeb4fa7c6ef4255cabef0133dd1c1b2f9dd4 /include | |
| parent | 61b8d2d06893497fa6c04e08030c898e64b33b88 (diff) | |
| parent | 6a6c25411593b7742098f7fdd937c6f98974bae9 (diff) | |
Merge "clk: qcom: Add support to register GPU rbcpr clocks"
Diffstat (limited to 'include')
| -rw-r--r-- | include/dt-bindings/clock/qcom,gpu-sdm660.h | 42 |
1 files changed, 22 insertions, 20 deletions
diff --git a/include/dt-bindings/clock/qcom,gpu-sdm660.h b/include/dt-bindings/clock/qcom,gpu-sdm660.h index 80b49d3420e3..fd5328c056b8 100644 --- a/include/dt-bindings/clock/qcom,gpu-sdm660.h +++ b/include/dt-bindings/clock/qcom,gpu-sdm660.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016, The Linux Foundation. All rights reserved. + * Copyright (c) 2016-2017, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -14,25 +14,27 @@ #ifndef _DT_BINDINGS_CLK_MSM_GPU_660_H #define _DT_BINDINGS_CLK_MSM_GPU_660_H -#define GFX3D_CLK_SRC 0 -#define GPU_PLL0_PLL 1 -#define GPU_PLL0_PLL_OUT_AUX 2 -#define GPU_PLL0_PLL_OUT_AUX2 3 -#define GPU_PLL0_PLL_OUT_EARLY 4 -#define GPU_PLL0_PLL_OUT_MAIN 5 -#define GPU_PLL0_PLL_OUT_TEST 6 -#define GPU_PLL1_PLL 7 -#define GPU_PLL1_PLL_OUT_AUX 8 -#define GPU_PLL1_PLL_OUT_AUX2 9 -#define GPU_PLL1_PLL_OUT_EARLY 10 -#define GPU_PLL1_PLL_OUT_MAIN 11 -#define GPU_PLL1_PLL_OUT_TEST 12 -#define GPUCC_CXO_CLK 13 -#define GPUCC_GFX3D_CLK 14 -#define GPUCC_RBBMTIMER_CLK 15 -#define GPUCC_RBCPR_CLK 16 -#define RBBMTIMER_CLK_SRC 17 -#define RBCPR_CLK_SRC 18 +#define GPU_PLL0_PLL 0 +#define GPU_PLL0_PLL_OUT_AUX 1 +#define GPU_PLL0_PLL_OUT_AUX2 2 +#define GPU_PLL0_PLL_OUT_EARLY 3 +#define GPU_PLL0_PLL_OUT_MAIN 4 +#define GPU_PLL0_PLL_OUT_TEST 5 +#define GPU_PLL1_PLL 6 +#define GPU_PLL1_PLL_OUT_AUX 7 +#define GPU_PLL1_PLL_OUT_AUX2 8 +#define GPU_PLL1_PLL_OUT_EARLY 9 +#define GPU_PLL1_PLL_OUT_MAIN 10 +#define GPU_PLL1_PLL_OUT_TEST 11 +#define GFX3D_CLK_SRC 12 +#define GPUCC_GFX3D_CLK 13 +#define GPUCC_RBBMTIMER_CLK 14 +#define RBBMTIMER_CLK_SRC 15 +#define GPUCC_CXO_CLK 16 + +/* RBCPR GPUCC clocks */ +#define RBCPR_CLK_SRC 0 +#define GPUCC_RBCPR_CLK 1 #define GPU_CX_GDSC 0 #define GPU_GX_GDSC 1 |
