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| author | Alexander Shiyan <shc_work@mail.ru> | 2018-12-20 11:06:38 +0300 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2019-03-23 08:44:32 +0100 |
| commit | 8512f804fd88b43bb2f2bb67d17993fc57bd3d58 (patch) | |
| tree | 14734331ac7f6df52ee7553b4a20ba030e42e911 /include | |
| parent | 82351c83b1c5a4c4052207cffaf2423a4c5e7871 (diff) | |
gpu: ipu-v3: Fix i.MX51 CSI control registers offset
[ Upstream commit 2c0408dd0d8906b26fe8023889af7adf5e68b2c2 ]
The CSI0/CSI1 registers offset is at +0xe030000/+0xe038000 relative
to the control module registers on IPUv3EX.
This patch fixes wrong values for i.MX51 CSI0/CSI1.
Fixes: 2ffd48f2e7 ("gpu: ipu-v3: Add Camera Sensor Interface unit")
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Sasha Levin <sashal@kernel.org>
Diffstat (limited to 'include')
0 files changed, 0 insertions, 0 deletions