diff options
| author | Cong Tang <congt@codeaurora.org> | 2018-11-27 17:20:39 +0800 |
|---|---|---|
| committer | Gerrit - the friendly Code Review server <code-review@localhost> | 2018-12-18 23:08:40 -0800 |
| commit | 84b3d9aa80b541a41958d159f6ecbc86de8d3d43 (patch) | |
| tree | fdc0f117b9eba4e7482e03ab9b2fbd508b30f09f /include | |
| parent | 897db080e2b96fff7c64ba0f80909dfac9efbc5a (diff) | |
ASoC: msm: Group mi2s driver support for msm8996
Support group mi2s driver for sec/tert/quat mi2s interface in
msm8996.
Change-Id: I656612ca104c80770e316bc4d541d2ae56164e61
Signed-off-by: Cong Tang <congt@codeaurora.org>
Diffstat (limited to 'include')
| -rw-r--r-- | include/sound/apr_audio-v2.h | 138 | ||||
| -rw-r--r-- | include/sound/q6afe-v2.h | 70 |
2 files changed, 208 insertions, 0 deletions
diff --git a/include/sound/apr_audio-v2.h b/include/sound/apr_audio-v2.h index 48fe32252e8d..89e05abfd74b 100644 --- a/include/sound/apr_audio-v2.h +++ b/include/sound/apr_audio-v2.h @@ -1489,11 +1489,35 @@ struct adm_cmd_connect_afe_port_v5 { #define AFE_PORT_ID_PRIMARY_MI2S_RX 0x1000 #define AFE_PORT_ID_PRIMARY_MI2S_TX 0x1001 #define AFE_PORT_ID_SECONDARY_MI2S_RX 0x1002 +#define AFE_PORT_ID_SECONDARY_MI2S_RX_1 0x1040 +#define AFE_PORT_ID_SECONDARY_MI2S_RX_2 0x1042 +#define AFE_PORT_ID_SECONDARY_MI2S_RX_3 0x1044 +#define AFE_PORT_ID_SECONDARY_MI2S_RX_4 0x1046 #define AFE_PORT_ID_SECONDARY_MI2S_TX 0x1003 +#define AFE_PORT_ID_SECONDARY_MI2S_TX_1 0x1041 +#define AFE_PORT_ID_SECONDARY_MI2S_TX_2 0x1043 +#define AFE_PORT_ID_SECONDARY_MI2S_TX_3 0x1045 +#define AFE_PORT_ID_SECONDARY_MI2S_TX_4 0x1047 #define AFE_PORT_ID_TERTIARY_MI2S_RX 0x1004 +#define AFE_PORT_ID_TERTIARY_MI2S_RX_1 0x1048 +#define AFE_PORT_ID_TERTIARY_MI2S_RX_2 0x104A +#define AFE_PORT_ID_TERTIARY_MI2S_RX_3 0x104C +#define AFE_PORT_ID_TERTIARY_MI2S_RX_4 0x104E #define AFE_PORT_ID_TERTIARY_MI2S_TX 0x1005 +#define AFE_PORT_ID_TERTIARY_MI2S_TX_1 0x1049 +#define AFE_PORT_ID_TERTIARY_MI2S_TX_2 0x104B +#define AFE_PORT_ID_TERTIARY_MI2S_TX_3 0x104D +#define AFE_PORT_ID_TERTIARY_MI2S_TX_4 0x104F #define AFE_PORT_ID_QUATERNARY_MI2S_RX 0x1006 +#define AFE_PORT_ID_QUATERNARY_MI2S_RX_1 0x1020 +#define AFE_PORT_ID_QUATERNARY_MI2S_RX_2 0x1022 +#define AFE_PORT_ID_QUATERNARY_MI2S_RX_3 0x1024 +#define AFE_PORT_ID_QUATERNARY_MI2S_RX_4 0x1026 #define AFE_PORT_ID_QUATERNARY_MI2S_TX 0x1007 +#define AFE_PORT_ID_QUATERNARY_MI2S_TX_1 0x1021 +#define AFE_PORT_ID_QUATERNARY_MI2S_TX_2 0x1023 +#define AFE_PORT_ID_QUATERNARY_MI2S_TX_3 0x1025 +#define AFE_PORT_ID_QUATERNARY_MI2S_TX_4 0x1027 #define AUDIO_PORT_ID_I2S_RX 0x1008 #define AFE_PORT_ID_DIGITAL_MIC_TX 0x1009 #define AFE_PORT_ID_PRIMARY_PCM_RX 0x100A @@ -10886,6 +10910,7 @@ struct afe_port_cmd_set_aanc_acdb_table { #define AFE_PARAM_ID_GROUP_DEVICE_CFG 0x00010255 #define AFE_PARAM_ID_GROUP_DEVICE_ENABLE 0x00010256 #define AFE_GROUP_DEVICE_ID_SECONDARY_MI2S_RX 0x1102 +#define AFE_PARAM_ID_GROUP_DEVICE_I2S_CONFIG 0x00010286 /* Payload of the #AFE_PARAM_ID_GROUP_DEVICE_CFG * parameter, which configures max of 8 AFE ports @@ -11069,6 +11094,119 @@ struct afe_param_id_group_device_tdm_cfg { @values 1 to 2^32 -1 */ } __packed; +#define AFE_GROUP_DEVICE_ID_SECONDARY_MI2S_TX \ + (AFE_PORT_ID_SECONDARY_MI2S_TX + 0x100) +#define AFE_GROUP_DEVICE_ID_TERTIARY_MI2S_RX \ + (AFE_PORT_ID_TERTIARY_MI2S_RX + 0x100) +#define AFE_GROUP_DEVICE_ID_TERTIARY_MI2S_TX \ + (AFE_PORT_ID_TERTIARY_MI2S_TX + 0x100) +#define AFE_GROUP_DEVICE_ID_QUATERNARY_MI2S_RX \ + (AFE_PORT_ID_QUATERNARY_MI2S_RX + 0x100) +#define AFE_GROUP_DEVICE_ID_QUATERNARY_MI2S_TX \ + (AFE_PORT_ID_QUATERNARY_MI2S_TX + 0x100) + +#define AFE_API_VERSION_GROUP_DEVICE_I2S_CONFIG 0x1 + +/* Payload of the AFE_PARAM_ID_GROUP_DEVICE_I2S_CONFIG parameter ID +* used by AFE_MODULE_GROUP_DEVICE. +*/ +struct afe_param_id_group_device_i2s_cfg_v1 { + u32 minor_version; + /**< Minor version used to track group device configuration. + * @values #AFE_API_VERSION_GROUP_DEVICE_I2S_CONFIG + */ + + u16 group_id; + /**< ID for the group device. + * @values + * - #AFE_GROUP_DEVICE_ID_SECONDARY_MI2S_RX + * - #AFE_GROUP_DEVICE_ID_SECONDARY_MI2S_TX + * - #AFE_GROUP_DEVICE_ID_TERTIARY_MI2S_RX + * - #AFE_GROUP_DEVICE_ID_TERTIARY_MI2S_TX + * - #AFE_GROUP_DEVICE_ID_QUATERNARY_MI2S_RX + * - #AFE_GROUP_DEVICE_ID_QUATERNARY_MI2S_RX + */ + + u16 channel_mode; + /**< Group line channel mode + * @values + * - #AFE_PORT_I2S_SD0 + * - #AFE_PORT_I2S_SD1 + * - #AFE_PORT_I2S_SD2 + * - #AFE_PORT_I2S_SD3 + * - #AFE_PORT_I2S_QUAD01 + * - #AFE_PORT_I2S_QUAD23 + * - #AFE_PORT_I2S_6CHS + * - #AFE_PORT_I2S_8CHS + */ + + u32 sample_rate; + /**< Sampling rate of the port. + * @values + * - #AFE_PORT_SAMPLE_RATE_8K + * - #AFE_PORT_SAMPLE_RATE_16K + * - #AFE_PORT_SAMPLE_RATE_24K + * - #AFE_PORT_SAMPLE_RATE_32K + */ + + u16 port_id[AFE_GROUP_DEVICE_NUM_PORTS]; + /**< Array of member port IDs of this group. + * @values + * - #AFE_PORT_ID_SECONDARY_MI2S_RX_1 + * - #AFE_PORT_ID_SECONDARY_MI2S_RX_2 + * - #AFE_PORT_ID_SECONDARY_MI2S_RX_3 + * - #AFE_PORT_ID_SECONDARY_MI2S_RX_4 + + * - #AFE_PORT_ID_SECONDARY_MI2S_TX_1 + * - #AFE_PORT_ID_SECONDARY_MI2S_TX_2 + * - #AFE_PORT_ID_SECONDARY_MI2S_TX_3 + * - #AFE_PORT_ID_SECONDARY_MI2S_TX_4 + + * - #AFE_PORT_ID_TERTIARY_MI2S_RX_1 + * - #AFE_PORT_ID_TERTIARY_MI2S_RX_2 + * - #AFE_PORT_ID_TERTIARY_MI2S_RX_3 + * - #AFE_PORT_ID_TERTIARY_MI2S_RX_4 + + * - #AFE_PORT_ID_TERTIARY_MI2S_TX_1 + * - #AFE_PORT_ID_TERTIARY_MI2S_TX_2 + * - #AFE_PORT_ID_TERTIARY_MI2S_TX_3 + * - #AFE_PORT_ID_TERTIARY_MI2S_TX_4 + + * - #AFE_PORT_ID_QUATERNARY_MI2S_RX_1 + * - #AFE_PORT_ID_QUATERNARY_MI2S_RX_2 + * - #AFE_PORT_ID_QUATERNARY_MI2S_RX_3 + * - #AFE_PORT_ID_QUATERNARY_MI2S_RX_4 + + * - #AFE_PORT_ID_QUATERNARY_MI2S_TX_1 + * - #AFE_PORT_ID_QUATERNARY_MI2S_TX_2 + * - #AFE_PORT_ID_QUATERNARY_MI2S_TX_3 + * - #AFE_PORT_ID_QUATERNARY_MI2S_TX_4 + * @tablebulletend + */ + + u16 bit_width; + /**< Bit width of the sample. + * @values 16, 24, (32) + */ + + u16 reserved; +} __packed; + +struct afe_param_id_group_device_enable { + u16 group_id; + u16 enable; +} __packed; + +union afe_port_group_mi2s_config { + struct afe_param_id_group_device_i2s_cfg_v1 i2s_cfg; + struct afe_param_id_group_device_enable group_enable; +} __packed; + +struct afe_i2s_port_config { + struct afe_param_id_i2s_cfg i2s_cfg; + struct afe_param_id_slot_mapping_cfg slot_mapping; +} __packed; + /* Payload of the #AFE_PARAM_ID_GROUP_DEVICE_ENABLE * parameter, which enables or * disables any module. diff --git a/include/sound/q6afe-v2.h b/include/sound/q6afe-v2.h index cdbf97023f66..a6d697d6a8f8 100644 --- a/include/sound/q6afe-v2.h +++ b/include/sound/q6afe-v2.h @@ -208,6 +208,33 @@ enum { IDX_AFE_PORT_ID_INT5_MI2S_TX, IDX_AFE_PORT_ID_INT6_MI2S_RX, IDX_AFE_PORT_ID_INT6_MI2S_TX, + /* IDX 143 -> 150 */ + IDX_AFE_PORT_ID_SECONDARY_MI2S_RX_1, + IDX_AFE_PORT_ID_SECONDARY_MI2S_RX_2, + IDX_AFE_PORT_ID_SECONDARY_MI2S_RX_3, + IDX_AFE_PORT_ID_SECONDARY_MI2S_RX_4, + IDX_AFE_PORT_ID_SECONDARY_MI2S_TX_1, + IDX_AFE_PORT_ID_SECONDARY_MI2S_TX_2, + IDX_AFE_PORT_ID_SECONDARY_MI2S_TX_3, + IDX_AFE_PORT_ID_SECONDARY_MI2S_TX_4, + /* IDX 151 -> 158 */ + IDX_AFE_PORT_ID_TERTIARY_MI2S_RX_1, + IDX_AFE_PORT_ID_TERTIARY_MI2S_RX_2, + IDX_AFE_PORT_ID_TERTIARY_MI2S_RX_3, + IDX_AFE_PORT_ID_TERTIARY_MI2S_RX_4, + IDX_AFE_PORT_ID_TERTIARY_MI2S_TX_1, + IDX_AFE_PORT_ID_TERTIARY_MI2S_TX_2, + IDX_AFE_PORT_ID_TERTIARY_MI2S_TX_3, + IDX_AFE_PORT_ID_TERTIARY_MI2S_TX_4, + /* IDX 159 -> 166 */ + IDX_AFE_PORT_ID_QUATERNARY_MI2S_RX_1, + IDX_AFE_PORT_ID_QUATERNARY_MI2S_RX_2, + IDX_AFE_PORT_ID_QUATERNARY_MI2S_RX_3, + IDX_AFE_PORT_ID_QUATERNARY_MI2S_RX_4, + IDX_AFE_PORT_ID_QUATERNARY_MI2S_TX_1, + IDX_AFE_PORT_ID_QUATERNARY_MI2S_TX_2, + IDX_AFE_PORT_ID_QUATERNARY_MI2S_TX_3, + IDX_AFE_PORT_ID_QUATERNARY_MI2S_TX_4, AFE_MAX_PORTS }; @@ -292,6 +319,44 @@ enum { IDX_GROUP_TDM_MAX, }; +enum { + IDX_SECONDARY_MI2S_RX_1, + IDX_SECONDARY_MI2S_RX_2, + IDX_SECONDARY_MI2S_RX_3, + IDX_SECONDARY_MI2S_RX_4, + IDX_SECONDARY_MI2S_TX_1, + IDX_SECONDARY_MI2S_TX_2, + IDX_SECONDARY_MI2S_TX_3, + IDX_SECONDARY_MI2S_TX_4, + IDX_TERTIARY_MI2S_RX_1, + IDX_TERTIARY_MI2S_RX_2, + IDX_TERTIARY_MI2S_RX_3, + IDX_TERTIARY_MI2S_RX_4, + IDX_TERTIARY_MI2S_TX_1, + IDX_TERTIARY_MI2S_TX_2, + IDX_TERTIARY_MI2S_TX_3, + IDX_TERTIARY_MI2S_TX_4, + IDX_QUATERNARY_MI2S_RX_1, + IDX_QUATERNARY_MI2S_RX_2, + IDX_QUATERNARY_MI2S_RX_3, + IDX_QUATERNARY_MI2S_RX_4, + IDX_QUATERNARY_MI2S_TX_1, + IDX_QUATERNARY_MI2S_TX_2, + IDX_QUATERNARY_MI2S_TX_3, + IDX_QUATERNARY_MI2S_TX_4, + IDX_GROUP_MI2S_PORT_MAX, +}; + +enum { + IDX_GROUP_SECONDARY_MI2S_RX, + IDX_GROUP_SECONDARY_MI2S_TX, + IDX_GROUP_TERTIARY_MI2S_RX, + IDX_GROUP_TERTIARY_MI2S_TX, + IDX_GROUP_QUATERNARY_MI2S_RX, + IDX_GROUP_QUATERNARY_MI2S_TX, + IDX_GROUP_MI2S_MAX, +}; + enum afe_mad_type { MAD_HW_NONE = 0x00, MAD_HW_AUDIO = 0x01, @@ -458,4 +523,9 @@ int afe_request_dma_resources(uint8_t dma_type, uint8_t num_read_dma_channels, int afe_get_dma_idx(bool **ret_rddma_idx, bool **ret_wrdma_idx); int afe_release_all_dma_resources(void); +int afe_i2s_port_start(u16 port_id, struct afe_i2s_port_config *i2s_port, + u32 rate, u16 num_groups); +int afe_port_group_mi2s_enable(u16 group_id, + union afe_port_group_mi2s_config *afe_group_config, + u16 enable); #endif /* __Q6AFE_V2_H__ */ |
