diff options
| author | Deepak Katragadda <dkatraga@codeaurora.org> | 2016-06-06 14:28:28 -0700 |
|---|---|---|
| committer | Kyle Yan <kyan@codeaurora.org> | 2016-06-07 16:06:33 -0700 |
| commit | 31bcecd1a2ab7e15d804ffaf3a7589c9cd91b1a9 (patch) | |
| tree | 1688216fbfb7d09bc878f4ea242115c9f3b5c05d /include | |
| parent | 1cdd0691fea2d985341935a3f2be1e52266cf749 (diff) | |
clk: msm: clock: Add support for programming the GCC_GPU_IREF_EN register
Add a new gcc_gpu_iref_clk that the graphics driver can control
as needed. The default state of the clock is ON; so having this
control will mean saving current.
CRs-Fixed: 1024948
Change-Id: I562bb546f49b1605f20fb7d705f40584d190230b
Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
Diffstat (limited to 'include')
| -rw-r--r-- | include/dt-bindings/clock/msm-clocks-cobalt.h | 1 | ||||
| -rw-r--r-- | include/dt-bindings/clock/msm-clocks-hwio-cobalt.h | 1 |
2 files changed, 2 insertions, 0 deletions
diff --git a/include/dt-bindings/clock/msm-clocks-cobalt.h b/include/dt-bindings/clock/msm-clocks-cobalt.h index bb2c7b64809a..cfbccad9f516 100644 --- a/include/dt-bindings/clock/msm-clocks-cobalt.h +++ b/include/dt-bindings/clock/msm-clocks-cobalt.h @@ -199,6 +199,7 @@ #define clk_gcc_gpu_bimc_gfx_src_clk 0x377cb748 #define clk_gcc_bimc_hmss_axi_clk 0x84653931 #define clk_gcc_gpu_cfg_ahb_clk 0x72f20a57 +#define clk_gcc_gpu_iref_clk 0xfd82abad #define clk_gcc_hmss_ahb_clk 0x62818713 #define clk_gcc_hmss_dvm_bus_clk 0x17cc8b53 #define clk_gcc_hmss_rbcpr_clk 0x699183be diff --git a/include/dt-bindings/clock/msm-clocks-hwio-cobalt.h b/include/dt-bindings/clock/msm-clocks-hwio-cobalt.h index 52a28b5cbaf5..4175d3be68a3 100644 --- a/include/dt-bindings/clock/msm-clocks-hwio-cobalt.h +++ b/include/dt-bindings/clock/msm-clocks-hwio-cobalt.h @@ -170,6 +170,7 @@ #define GCC_GPU_BIMC_GFX_SRC_CBCR 0x7100C #define GCC_GPU_CFG_AHB_CBCR 0x71004 #define GCC_GPU_SNOC_DVM_GFX_CBCR 0x71018 +#define GCC_GPU_IREF_EN 0x88010 #define GCC_BIMC_HMSS_AXI_CBCR 0x48004 #define GCC_HMSS_AHB_CBCR 0x48000 #define GCC_HMSS_DVM_BUS_CBCR 0x4808C |