summaryrefslogtreecommitdiff
path: root/include
diff options
context:
space:
mode:
authorUjwal Patel <ujwalp@codeaurora.org>2014-12-05 10:34:22 -0800
committerDavid Keitel <dkeitel@codeaurora.org>2016-03-23 20:36:39 -0700
commit0db371cd8a5a4b6a1d793112c3e1821af6401908 (patch)
tree0fdb3f1ec718b5fc994fa3c8fdfc2576b1b0c075 /include
parentd9f0e6931171463dbd3b865271ee18d6bff48ab2 (diff)
msm: mdss: fix staging VIG3 and RGB3 pipes at stage6
Starting MDSS 1.5, display controller can blend 7 layers excluding base layer. If a pipe is staged on stage6, it requires use of extension register. Current logic has a bug where if VIG3 of RGB3 pipes are on stage6 then configuration is incorrect and leads to bad HW behaviour. Fix this by correcting the staging logic. Change-Id: I4f34783a9bd8ae5e0898bcf25755cf687f195211 Signed-off-by: Ujwal Patel <ujwalp@codeaurora.org>
Diffstat (limited to 'include')
0 files changed, 0 insertions, 0 deletions