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| author | Bjorn Helgaas <bhelgaas@google.com> | 2012-11-13 14:34:06 -0700 |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2012-11-13 14:34:06 -0700 |
| commit | 7db78a9c864d1baf916d849febef31e274cfcb1f (patch) | |
| tree | ebbe90db1637aec1f1027dfa9436b0f5ede9453e /include/uapi | |
| parent | f9c15b429a5c82e613d59a32d4f49cea6e9d64eb (diff) | |
| parent | 71fbad6c9a28629b6af40b0ff48f36c6610a1394 (diff) | |
Merge branch 'pci/misc' into next
* pci/misc:
PCI/ACPI: Notify PCI devices when their power resource is turned on
PCI: Add GPL license for drivers/pci/ioapic module
PCI: Fix bit definitions of PCI_EXP_LNKCAP2 register
Diffstat (limited to 'include/uapi')
| -rw-r--r-- | include/uapi/linux/pci_regs.h | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/include/uapi/linux/pci_regs.h b/include/uapi/linux/pci_regs.h index 20ae747ddf34..259763d2df71 100644 --- a/include/uapi/linux/pci_regs.h +++ b/include/uapi/linux/pci_regs.h @@ -544,9 +544,9 @@ #define PCI_EXP_OBFF_WAKE_EN 0x6000 /* OBFF using WAKE# signaling */ #define PCI_CAP_EXP_ENDPOINT_SIZEOF_V2 44 /* v2 endpoints end here */ #define PCI_EXP_LNKCAP2 44 /* Link Capability 2 */ -#define PCI_EXP_LNKCAP2_SLS_2_5GB 0x01 /* Current Link Speed 2.5GT/s */ -#define PCI_EXP_LNKCAP2_SLS_5_0GB 0x02 /* Current Link Speed 5.0GT/s */ -#define PCI_EXP_LNKCAP2_SLS_8_0GB 0x04 /* Current Link Speed 8.0GT/s */ +#define PCI_EXP_LNKCAP2_SLS_2_5GB 0x02 /* Supported Link Speed 2.5GT/s */ +#define PCI_EXP_LNKCAP2_SLS_5_0GB 0x04 /* Supported Link Speed 5.0GT/s */ +#define PCI_EXP_LNKCAP2_SLS_8_0GB 0x08 /* Supported Link Speed 8.0GT/s */ #define PCI_EXP_LNKCAP2_CROSSLINK 0x100 /* Crosslink supported */ #define PCI_EXP_LNKCTL2 48 /* Link Control 2 */ #define PCI_EXP_LNKSTA2 50 /* Link Status 2 */ |