diff options
| author | Michael Bestas <mkbestas@lineageos.org> | 2020-05-10 01:16:37 +0300 |
|---|---|---|
| committer | Michael Bestas <mkbestas@lineageos.org> | 2020-05-10 01:16:37 +0300 |
| commit | 47adfb24dc4eabe3507c89902c5068f501b01b13 (patch) | |
| tree | 43a9520183d7c5e71f35c4232f5969e03a81e2f2 /include/uapi | |
| parent | 3b67690543369a21fb5338e6d44d2153ab6bad14 (diff) | |
| parent | 8f2aea5ad6d885f885ca399059fab0424e2fef67 (diff) | |
Merge tag 'LA.UM.8.4.r1-05400-8x98.0' of https://source.codeaurora.org/quic/la/kernel/msm-4.4 into lineage-17.1-caf-msm8998
* tag 'LA.UM.8.4.r1-05400-8x98.0' of https://source.codeaurora.org/quic/la/kernel/msm-4.4:
msm: mdss: hdcp: reauth on rxstatus ddc read failure
msm: mdss: edid: restrain support for interlace video modes
fbdev/msm: Modify cdm block destroy sequence
msm: mdss: hdmi: fix EDID parser issue
msm: mdss: hdmi: clear EDID parsed data
msm: mdss: hdmi: reset TMDS_Bit_Clock_Ratio bit
fbdev: msm: handle unbalanced TE irq calls
android: lowmemorykiller: consider unevictable pages
Change-Id: I4fbda9ed9d88134dfdd300696ef7f584544967f1
Diffstat (limited to 'include/uapi')
| -rw-r--r-- | include/uapi/video/msm_hdmi_modes.h | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/include/uapi/video/msm_hdmi_modes.h b/include/uapi/video/msm_hdmi_modes.h index 5b4b2b492be4..1a8fbabe0d81 100644 --- a/include/uapi/video/msm_hdmi_modes.h +++ b/include/uapi/video/msm_hdmi_modes.h @@ -271,13 +271,13 @@ struct msm_hdmi_mode_timing_info { 720, 5, 5, 20, false, 74250, 60000, false, true, HDMI_RES_AR_16_9, 0} #define HDMI_VFRMT_1920x1080i60_16_9_TIMING \ {HDMI_VFRMT_1920x1080i60_16_9, 1920, 88, 44, 148, false, \ - 540, 2, 5, 5, false, 74250, 60000, true, true, HDMI_RES_AR_16_9, 0} + 540, 2, 5, 5, false, 74250, 60000, true, false, HDMI_RES_AR_16_9, 0} #define HDMI_VFRMT_1440x480i60_4_3_TIMING \ {HDMI_VFRMT_1440x480i60_4_3, 1440, 38, 124, 114, true, \ - 240, 4, 3, 15, true, 27000, 60000, true, true, HDMI_RES_AR_4_3, 0} + 240, 4, 3, 15, true, 27000, 60000, true, false, HDMI_RES_AR_4_3, 0} #define HDMI_VFRMT_1440x480i60_16_9_TIMING \ {HDMI_VFRMT_1440x480i60_16_9, 1440, 38, 124, 114, true, \ - 240, 4, 3, 15, true, 27000, 60000, true, true, HDMI_RES_AR_16_9, 0} + 240, 4, 3, 15, true, 27000, 60000, true, false, HDMI_RES_AR_16_9, 0} #define HDMI_VFRMT_1920x1080p60_16_9_TIMING \ {HDMI_VFRMT_1920x1080p60_16_9, 1920, 88, 44, 148, false, \ 1080, 4, 5, 36, false, 148500, 60000, false, true, HDMI_RES_AR_16_9, 0} @@ -292,10 +292,10 @@ struct msm_hdmi_mode_timing_info { 720, 5, 5, 20, false, 74250, 50000, false, true, HDMI_RES_AR_16_9, 0} #define HDMI_VFRMT_1440x576i50_4_3_TIMING \ {HDMI_VFRMT_1440x576i50_4_3, 1440, 24, 126, 138, true, \ - 288, 2, 3, 19, true, 27000, 50000, true, true, HDMI_RES_AR_4_3, 0} + 288, 2, 3, 19, true, 27000, 50000, true, false, HDMI_RES_AR_4_3, 0} #define HDMI_VFRMT_1440x576i50_16_9_TIMING \ {HDMI_VFRMT_1440x576i50_16_9, 1440, 24, 126, 138, true, \ - 288, 2, 3, 19, true, 27000, 50000, true, true, HDMI_RES_AR_16_9, 0} + 288, 2, 3, 19, true, 27000, 50000, true, false, HDMI_RES_AR_16_9, 0} #define HDMI_VFRMT_1920x1080p50_16_9_TIMING \ {HDMI_VFRMT_1920x1080p50_16_9, 1920, 528, 44, 148, false, \ 1080, 4, 5, 36, false, 148500, 50000, false, true, HDMI_RES_AR_16_9, 0} |