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authorMark Brown <broonie@linaro.org>2014-04-10 23:39:52 +0100
committerMark Brown <broonie@linaro.org>2014-04-10 23:39:52 +0100
commit09c0998efcb4a23e27c297f48309e0b2abc76563 (patch)
treee2c1d589095af11d2a56239df9beb7ddad566f67 /include/uapi/linux
parent455c6fdbd219161bd09b1165f11699d6d73de11c (diff)
parent45b15d98a96ffdb3c608bdad952f51930c151420 (diff)
Merge tag 'spi-v3.15' into spi-linus
spi: Updates for v3.15 A busy release for both cleanups and new drivers this time along with further factoring out of replicated code into the core: - Provide support in the core for DMA mapping transfers - essentially all drivers weren't implementing this properly, now there's no excuse. - Dual and quad mode support for spidev. - Fix handling of cs_change in the generic implementation. - Remove the S3C_DMA code from the s3c64xx driver now that all the platforms using it have been converted to dmaengine. - Lots of improvements to the Renesas SPI controllers. - Drivers for Allwinner A10 and A31, Qualcomm QUP and Xylinx xtfpga. - Removal of the bitrotted ti-ssp driver. # gpg: Signature made Mon 31 Mar 2014 12:03:09 BST using RSA key ID 7EA229BD # gpg: Good signature from "Mark Brown <broonie@sirena.org.uk>" # gpg: aka "Mark Brown <broonie@debian.org>" # gpg: aka "Mark Brown <broonie@kernel.org>" # gpg: aka "Mark Brown <broonie@tardis.ed.ac.uk>" # gpg: aka "Mark Brown <broonie@linaro.org>" # gpg: aka "Mark Brown <Mark.Brown@linaro.org>"
Diffstat (limited to 'include/uapi/linux')
-rw-r--r--include/uapi/linux/spi/spidev.h14
1 files changed, 12 insertions, 2 deletions
diff --git a/include/uapi/linux/spi/spidev.h b/include/uapi/linux/spi/spidev.h
index 52d9ed01855f..dd5f21e75805 100644
--- a/include/uapi/linux/spi/spidev.h
+++ b/include/uapi/linux/spi/spidev.h
@@ -42,6 +42,10 @@
#define SPI_LOOP 0x20
#define SPI_NO_CS 0x40
#define SPI_READY 0x80
+#define SPI_TX_DUAL 0x100
+#define SPI_TX_QUAD 0x200
+#define SPI_RX_DUAL 0x400
+#define SPI_RX_QUAD 0x800
/*---------------------------------------------------------------------------*/
@@ -92,7 +96,9 @@ struct spi_ioc_transfer {
__u16 delay_usecs;
__u8 bits_per_word;
__u8 cs_change;
- __u32 pad;
+ __u8 tx_nbits;
+ __u8 rx_nbits;
+ __u16 pad;
/* If the contents of 'struct spi_ioc_transfer' ever change
* incompatibly, then the ioctl number (currently 0) must change;
@@ -110,7 +116,7 @@ struct spi_ioc_transfer {
#define SPI_IOC_MESSAGE(N) _IOW(SPI_IOC_MAGIC, 0, char[SPI_MSGSIZE(N)])
-/* Read / Write of SPI mode (SPI_MODE_0..SPI_MODE_3) */
+/* Read / Write of SPI mode (SPI_MODE_0..SPI_MODE_3) (limited to 8 bits) */
#define SPI_IOC_RD_MODE _IOR(SPI_IOC_MAGIC, 1, __u8)
#define SPI_IOC_WR_MODE _IOW(SPI_IOC_MAGIC, 1, __u8)
@@ -126,6 +132,10 @@ struct spi_ioc_transfer {
#define SPI_IOC_RD_MAX_SPEED_HZ _IOR(SPI_IOC_MAGIC, 4, __u32)
#define SPI_IOC_WR_MAX_SPEED_HZ _IOW(SPI_IOC_MAGIC, 4, __u32)
+/* Read / Write of the SPI mode field */
+#define SPI_IOC_RD_MODE32 _IOR(SPI_IOC_MAGIC, 5, __u32)
+#define SPI_IOC_WR_MODE32 _IOW(SPI_IOC_MAGIC, 5, __u32)
+
#endif /* SPIDEV_H */