cpuidle: lpm-levels: Add API to get low power mode latency

Add API to get latency for a low power mode with particular
affinity level and reset level. Reset level is level at which
only control logic power collpase happen or both control and
memory logic power collapse happen or Retention state.

The API returns the minum latency out of all clusters in the
particular affinity level and reset level if cluster name is
not passed or the latency of the specific cluster for which
the cluster name is passed.

Change-Id: I2facd9a1fa2dba7e7103d65544537799bd8ba518
Signed-off-by: Srinivas Rao L <lsrao@codeaurora.org>

Conflicts:
	arch/arm/boot/dts/qcom/mdm9607-pm.dtsi
	arch/arm/boot/dts/qcom/mdm9640-pm.dtsi
	arch/arm/boot/dts/qcom/mdmcalifornium-pm.dtsi
	arch/arm/boot/dts/qcom/msm8909-pm8909-pm.dtsi
	arch/arm/boot/dts/qcom/msm8909-pm8916-pm.dtsi
	arch/arm/boot/dts/qcom/msm8937-pm.dtsi
	arch/arm/boot/dts/qcom/msm8952-pm.dtsi
	arch/arm/boot/dts/qcom/msmgold-pm.dtsi
	arch/arm/boot/dts/qcom/msmtitanium-pm.dtsi

1 files changed, 43 insertions, 1 deletions

diff --git a/include/soc/qcom/pm.h b/include/soc/qcom/pm.h
index e7c7909e39f5..ea19c2562f66 100644
--- a/include/soc/qcom/pm.h
+++ b/include/soc/qcom/pm.h
@@ -1,6 +1,6 @@
 /*
  * Copyright (C) 2007 Google, Inc.
- * Copyright (c) 2009-2015, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2009-2016, The Linux Foundation. All rights reserved.
  * Author: San Mehat <san@android.com>
  *
  * This software is licensed under the terms of the GNU General Public
@@ -21,6 +21,7 @@
 #include <linux/cpuidle.h>
 #include <asm/smp_plat.h>
 #include <asm/barrier.h>
+#include <dt-bindings/msm/pm.h>
 
 #if !defined(CONFIG_SMP)
 #define msm_secondary_startup NULL
@@ -62,6 +63,12 @@ struct msm_pm_sleep_status_data {
 	uint32_t mask;
 };
 
+struct latency_level {
+	int affinity_level;
+	int reset_level;
+	const char *level_name;
+};
+
 /**
  * lpm_cpu_pre_pc_cb(): API to get the L2 flag to pass to TZ
  *
@@ -115,12 +122,41 @@ static inline void msm_arch_idle(void)
 }
 
 #ifdef CONFIG_MSM_PM
+
 void msm_pm_set_rpm_wakeup_irq(unsigned int irq);
 int msm_pm_wait_cpu_shutdown(unsigned int cpu);
 int __init msm_pm_sleep_status_init(void);
 void lpm_cpu_hotplug_enter(unsigned int cpu);
 s32 msm_cpuidle_get_deep_idle_latency(void);
 int msm_pm_collapse(unsigned long unused);
+
+/**
+ * lpm_get_latency() - API to get latency for a low power mode
+ * @latency_level:	pointer to structure with below elements
+ * affinity_level: The level (CPU/L2/CCI etc.) for which the
+ *	latency is required.
+ *	LPM_AFF_LVL_CPU : CPU level
+ *	LPM_AFF_LVL_L2  : L2 level
+ *	LPM_AFF_LVL_CCI : CCI level
+ * reset_level: Can be passed "LPM_RESET_LVL_GDHS" for
+ *	low power mode with control logic power collapse or
+ *	"LPM_RESET_LVL_PC" for low power mode with control and
+ *	memory logic power collapse or "LPM_RESET_LVL_RET" for
+ *	retention mode.
+ * level_name: Pointer to the cluster name for which the latency
+ *	is required or NULL if the minimum value out of all the
+ *	clusters is to be returned. For CPU level, the name of the
+ *	L2 cluster to be passed. For CCI it has no effect.
+ * @latency:	address to get the latency value.
+ *
+ * latency value will be for the particular cluster or the minimum
+ * value out of all the clusters at the particular affinity_level
+ * and reset_level.
+ *
+ * Return: 0 for success; Error number for failure.
+ */
+int lpm_get_latency(struct latency_level *level, uint32_t *latency);
+
 #else
 static inline void msm_pm_set_rpm_wakeup_irq(unsigned int irq) {}
 static inline int msm_pm_wait_cpu_shutdown(unsigned int cpu) { return 0; }
@@ -133,6 +169,12 @@ static inline void lpm_cpu_hotplug_enter(unsigned int cpu)
 
 static inline s32 msm_cpuidle_get_deep_idle_latency(void) { return 0; }
 #define msm_pm_collapse NULL
+
+static inline int lpm_get_latency(struct latency_level *level,
+						uint32_t *latency)
+{
+	return 0;
+}
 #endif
 
 #ifdef CONFIG_HOTPLUG_CPU