Promotion of kernel.lnx.4.4-160524.

CRs      Change ID                                   Subject
--------------------------------------------------------------------------------------------------------------
1019225   I136c0d3583cef15b3ba22fbf6b8acbe014f9e8ab   input: qpnp-power-on: modify the bit range to store rest
1018162   I715cf7ad7975c6e020458f623262dc02927795a7   soc: qcom: watchdog_v2: Support userspace watchdog
991557   I2a470fb906bb9747f0e1b2c08a231edecc184036   cpuidle: lpm_levels: Remove duplicate cpuidle tracepoint
1019888   Iab07f3dd933a9faf8a7ada737c9e9389d185d6e3   crypto: msm: Update Kconfig to enable hw crypto driver f
1008137   I999db2865d10464c7f1ab4a5a940d23c725ac033   diag: Fix for possible stale task entries
1019313   I5f66be80899c33816c886df526db9e50d7e9aff9   qcom-charger: qpnp-smb2: disable Type-C factory mode
987010   I7baa9f127266726fecf9238167a1e0128a258847   ASoC: msm: qdsp6v2: Change audio drivers to use %pK
1010222   I060ea878b55ce0f9983b91c50e58718c8a2c2fa1   USB: dwc3: debugfs: Add boundary check in dwc3_store_ep_
1021066   I8d411e067690443eefea645f4ff8130cf786c32f   icnss: Provide test mode through debugfs
1018709   Ie9a21544966fb54cf9920e9c719309cc66157846   usb: gadget: Iterate over all IN EPs for allocation of T
993024   Ic21c25a33a8b2430903e9c1f3d339022551d81d6   msm: mdss: Defer wb probe until mdss probe done
1016916   I4da057a32b57af6431ead37522f877b114188699   ARM: dts: add CSR device for msmcobalt
949595   I96bf477a14bb135cf9196532cf4bf39a45c9ff77   pwm: qpnp: support DTEST configuration for PWM subtype
1008396   I92969b7b59a64018b80470566567887248ced2bd   msm: pcie: add support to get PCIe port PHY sequence fro
1009283   Ibf4abb99e5e3e7aa9a9212b57094876f6ec6e9f0   pwm: qpnp: Enable glitch removal selectively
1018890   Iead0966d76acb2d2bbc41fa9cd5d09a252a3429e   msm: ADSPRPC: Provide SMMU information
1019888   Ic2b623bf871bc3918d3d58f99966ac7f746d7b8a   defconfig: msmcortex: enable qcom hw crypto drivers
978785   I025a59d92aca2585335768c94f7a188c339aa788   msm: mdss: Add remaining interleaved YUV format to defin
984628   I50de4488c32ef78efec1587305c56ab06fb32fed   pwm: qpnp: configure PWM period during bootup
1015446   If69f3752c4295f4cc49cf41854edc03aa90dbbc5   clk: msm: clock: Support peripheral clocks on MSMCOBALT
1019697   I1a77291e77410c6ed99474335a6d25742c409e47   coresight: add stm logging to support optimization in tr
973565   I2376f10161040dbf426887ce146ac597f401153f   msm: kgsl: Create sysfs entry to control GPU NAP state
1019289   I5dc7d8ed4407df5baa94e069b00897086bd02ab8   msm: mdss: dsi: add ulps support for DSI PHY v3
1016914   I1537c92ac86964fdbe9abb012f972d5f3b36047a   jtagv8: add jtagv8 support snapshot
1019888   I5d2861bdb934ac0224fa73b59b350d0d360f5c95   ARM: dts: Add qcedev & qcrypto drivers support for msmco
1015532   Idf381b86cd44679ea1f8b6fbfe85b2616232f533   ARM: dts: add remote etm devices for msmcobalt
1019289   Ie5c171e13dcccc711ba03acb38fcd7876e792cee   clk: msm: mdss: fix DSI PLL programming for msmcobalt
1016914   Iafc718d5fe3ee392836035c7d301ad2ed6d5f148   soc: qcom: set default enable for MSM_JTAGV8
1010839   I2ed58d3e61ca4c64cf72569541fc6ee7f6ba651f   msm: mdss: Set dither matrix len to 0 for default config
1017305   Idc4556e568a42aa2441295c9e3caa3f2c92c4cc6   diag: Fix to proper updation of buffering flag
1016914   Iff5ba04b2e494f7a5de00e4d05606878ee3d8148   arch: arm64: disable HW breakpoint
1018890   I3d7fb2829defd8efc362253866587652f35e316b   msm: ADSPRPC: Map pages with execute permissions
1007521   I6d060afb48aca34c2bb54221c5babc0ac55aff7c   msm: vidc: Add SEI extradata
1008138   I7d78a13032365a42097ad71cfd0abab2792a1b98   diag: Fix for possible dci error notification
984942 992683   Ifcd9f14dc03d9e42a31b3e126839489881e98303   diag: Fix for possible dci stale entries
1019806   I064c208557bc7b74bcb342fea76df9c9e10c8405   ARM: dts: configure trigout function for gpio 58
1019697   I4fcb42f2e97ab963fdc85853f4f3ea1f208bfc3c   coresight: enable stm logging for trace events, marker a
1019289   Ie3a2da3c306bc8a85aaf1495afb365c38cf805aa   ARM: dts: msm: add support for nt35597 DSC panels on msm
989505   Iebcde6d233ff8580aa83b1885f1e8a01644dd1f4   msm: ipa3: add ipa_mhi to ipa_clients
1012715   I6dbc344d5d7063c7cfd2fb29c2c39fdee1250bbf   ASoC: wcd_cpe_core: Connect to input AFE port during LSM
1018890   I93e3c6faa400121612d90f9be8fd5befe45fb39c   msm: ADSPRPC: Provide process information in context
1001827   Ib2118f323b5dc1d64eaa5aa1f600e4725187f05b   defconfig: msmcortex: enable wil driver
1018785   I64d0abe7091f81f85e83747f09ece4bc524a4057   clk: msm: clock-gpu-cobalt: Correct the CRC enable seque
1019201   I64472af6e9983929e0d3ea08601d17c7a2b7c4ef   msm: mdss: Fix elements ordering of all YUV interleaved
1019089   If6aaef3b04a9da15c7f8cfaf1308706b8a2fe793   soc: qcom: socinfo: Add soc ids for MSM8996pro and APQ80
1019289   If5e6a6b0d7753e3fc83ed6df5d866a62eb5cd60b   ARM: dts: msm: add nt35597 dual dsi cmd mode panel for m
987962   Id0f46265b10fa06f71a9085aa302536c5f14d295   ARM: dts: msm: Add extra clocks for ispif node for msmco
1021055   Icd56b61a372cb18e6600617184d8b185b78ce99d   icnss: Remove unused APIs
1019156   I425087a02b680a5a1bc0579fd4d1410eb92d8e4c   extcon: Add support for USB connector speed
1015446   Ibf5a8d7b6bc484281f414dd8491845e509d80123   ARM: dts: msm: Enable the GCC clock driver on MSMCOBALT
1018162   I1a62b6ec73e7cd581a535316029956ea7ce23ba0   soc: qcom: watchdog_v2: Change completion to wait_queue

Change-Id: I056063f90d4074d11b3092aece0ea64be9d6d9fe
CRs-Fixed: 1019225, 1009283, 987010, 1019089, 991557, 1019201, 1008137, 1021055, 987962, 1012715, 1008138, 993024, 1001827, 1021066, 1008396, 949595, 1015532, 1019697, 1018890, 992683, 1017305, 984942, 1010222, 1015446, 1019313, 1019156, 1018162, 978785, 1019888, 1018785, 1016916, 1016914, 1019806, 1007521, 973565, 1019289, 1018709, 989505, 1010839, 984628

4 files changed, 174 insertions, 145 deletions

diff --git a/include/linux/extcon.h b/include/linux/extcon.h
index faf9ae79ca3c..e1360198955a 100644
--- a/include/linux/extcon.h
+++ b/include/linux/extcon.h
@@ -58,6 +58,9 @@
 /* connector orientation 0 - CC1, 1 - CC2 */
 #define EXTCON_USB_CC		28
 
+/* connector speed 0 - High Speed, 1 - super speed */
+#define EXTCON_USB_SPEED	29
+
 /* Display external connector */
 #define EXTCON_DISP_HDMI	40	/* High-Definition Multimedia Interface */
 #define EXTCON_DISP_MHL		41	/* Mobile High-Definition Link */
diff --git a/include/linux/ipa.h b/include/linux/ipa.h
index 0dd2f0bf9c23..a0dd21d215d2 100644
--- a/include/linux/ipa.h
+++ b/include/linux/ipa.h
@@ -1056,92 +1056,6 @@ struct ipa_wdi_buffer_info {
 };
 
 /**
- * enum ipa_mhi_event_type - event type for mhi callback
- *
- * @IPA_MHI_EVENT_READY: IPA MHI is ready and IPA uC is loaded. After getting
- *	this event MHI client is expected to call to ipa_mhi_start() API
- * @IPA_MHI_EVENT_DATA_AVAILABLE: downlink data available on MHI channel
- */
-enum ipa_mhi_event_type {
-	IPA_MHI_EVENT_READY,
-	IPA_MHI_EVENT_DATA_AVAILABLE,
-	IPA_MHI_EVENT_MAX,
-};
-
-typedef void (*mhi_client_cb)(void *priv, enum ipa_mhi_event_type event,
-	unsigned long data);
-
-/**
- * struct ipa_mhi_msi_info - parameters for MSI (Message Signaled Interrupts)
- * @addr_low: MSI lower base physical address
- * @addr_hi: MSI higher base physical address
- * @data: Data Pattern to use when generating the MSI
- * @mask: Mask indicating number of messages assigned by the host to device
- *
- * msi value is written according to this formula:
- *	((data & ~mask) | (mmio.msiVec & mask))
- */
-struct ipa_mhi_msi_info {
-	u32 addr_low;
-	u32 addr_hi;
-	u32 data;
-	u32 mask;
-};
-
-/**
- * struct ipa_mhi_init_params - parameters for IPA MHI initialization API
- *
- * @msi: MSI (Message Signaled Interrupts) parameters
- * @mmio_addr: MHI MMIO physical address
- * @first_ch_idx: First channel ID for hardware accelerated channels.
- * @first_er_idx: First event ring ID for hardware accelerated channels.
- * @assert_bit40: should assert bit 40 in order to access hots space.
- *	if PCIe iATU is configured then not need to assert bit40
- * @notify: client callback
- * @priv: client private data to be provided in client callback
- * @test_mode: flag to indicate if IPA MHI is in unit test mode
- */
-struct ipa_mhi_init_params {
-	struct ipa_mhi_msi_info msi;
-	u32 mmio_addr;
-	u32 first_ch_idx;
-	u32 first_er_idx;
-	bool assert_bit40;
-	mhi_client_cb notify;
-	void *priv;
-	bool test_mode;
-};
-
-/**
- * struct ipa_mhi_start_params - parameters for IPA MHI start API
- *
- * @host_ctrl_addr: Base address of MHI control data structures
- * @host_data_addr: Base address of MHI data buffers
- * @channel_context_addr: channel context array address in host address space
- * @event_context_addr: event context array address in host address space
- */
-struct ipa_mhi_start_params {
-	u32 host_ctrl_addr;
-	u32 host_data_addr;
-	u64 channel_context_array_addr;
-	u64 event_context_array_addr;
-};
-
-/**
- * struct ipa_mhi_connect_params - parameters for IPA MHI channel connect API
- *
- * @sys: IPA EP configuration info
- * @channel_id: MHI channel id
- */
-struct ipa_mhi_connect_params {
-	struct ipa_sys_connect_params sys;
-	u8 channel_id;
-};
-
-/* bit #40 in address should be asserted for MHI transfers over pcie */
-#define IPA_MHI_HOST_ADDR(addr) ((addr) | BIT_ULL(40))
-
-/**
  * struct ipa_gsi_ep_config - IPA GSI endpoint configurations
  *
  * @ipa_ep_num: IPA EP pipe number
@@ -1436,23 +1350,6 @@ int ipa_dma_uc_memcpy(phys_addr_t dest, phys_addr_t src, int len);
 void ipa_dma_destroy(void);
 
 /*
- * MHI
- */
-int ipa_mhi_init(struct ipa_mhi_init_params *params);
-
-int ipa_mhi_start(struct ipa_mhi_start_params *params);
-
-int ipa_mhi_connect_pipe(struct ipa_mhi_connect_params *in, u32 *clnt_hdl);
-
-int ipa_mhi_disconnect_pipe(u32 clnt_hdl);
-
-int ipa_mhi_suspend(bool force);
-
-int ipa_mhi_resume(void);
-
-void ipa_mhi_destroy(void);
-
-/*
  * mux id
  */
 int ipa_write_qmap_id(struct ipa_ioc_write_qmapid *param_in);
@@ -2112,45 +2009,6 @@ static inline void ipa_dma_destroy(void)
 }
 
 /*
- * MHI
- */
-static inline int ipa_mhi_init(struct ipa_mhi_init_params *params)
-{
-	return -EPERM;
-}
-
-static inline int ipa_mhi_start(struct ipa_mhi_start_params *params)
-{
-	return -EPERM;
-}
-
-static inline int ipa_mhi_connect_pipe(struct ipa_mhi_connect_params *in,
-	u32 *clnt_hdl)
-{
-	return -EPERM;
-}
-
-static inline int ipa_mhi_disconnect_pipe(u32 clnt_hdl)
-{
-	return -EPERM;
-}
-
-static inline int ipa_mhi_suspend(bool force)
-{
-	return -EPERM;
-}
-
-static inline int ipa_mhi_resume(void)
-{
-	return -EPERM;
-}
-
-static inline void ipa_mhi_destroy(void)
-{
-	return;
-}
-
-/*
  * mux id
  */
 static inline int ipa_write_qmap_id(struct ipa_ioc_write_qmapid *param_in)
diff --git a/include/linux/ipa_mhi.h b/include/linux/ipa_mhi.h
new file mode 100644
index 000000000000..4d3b9747a876
--- /dev/null
+++ b/include/linux/ipa_mhi.h
@@ -0,0 +1,161 @@
+/* Copyright (c) 2016, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef IPA_MHI_H_
+#define IPA_MHI_H_
+
+#include <linux/ipa.h>
+#include <linux/types.h>
+
+/**
+ * enum ipa_mhi_event_type - event type for mhi callback
+ *
+ * @IPA_MHI_EVENT_READY: IPA MHI is ready and IPA uC is loaded. After getting
+ *	this event MHI client is expected to call to ipa_mhi_start() API
+ * @IPA_MHI_EVENT_DATA_AVAILABLE: downlink data available on MHI channel
+ */
+enum ipa_mhi_event_type {
+	IPA_MHI_EVENT_READY,
+	IPA_MHI_EVENT_DATA_AVAILABLE,
+	IPA_MHI_EVENT_MAX,
+};
+
+typedef void (*mhi_client_cb)(void *priv, enum ipa_mhi_event_type event,
+	unsigned long data);
+
+/**
+ * struct ipa_mhi_msi_info - parameters for MSI (Message Signaled Interrupts)
+ * @addr_low: MSI lower base physical address
+ * @addr_hi: MSI higher base physical address
+ * @data: Data Pattern to use when generating the MSI
+ * @mask: Mask indicating number of messages assigned by the host to device
+ *
+ * msi value is written according to this formula:
+ *	((data & ~mask) | (mmio.msiVec & mask))
+ */
+struct ipa_mhi_msi_info {
+	u32 addr_low;
+	u32 addr_hi;
+	u32 data;
+	u32 mask;
+};
+
+/**
+ * struct ipa_mhi_init_params - parameters for IPA MHI initialization API
+ *
+ * @msi: MSI (Message Signaled Interrupts) parameters
+ * @mmio_addr: MHI MMIO physical address
+ * @first_ch_idx: First channel ID for hardware accelerated channels.
+ * @first_er_idx: First event ring ID for hardware accelerated channels.
+ * @assert_bit40: should assert bit 40 in order to access host space.
+ *	if PCIe iATU is configured then not need to assert bit40
+ * @notify: client callback
+ * @priv: client private data to be provided in client callback
+ * @test_mode: flag to indicate if IPA MHI is in unit test mode
+ */
+struct ipa_mhi_init_params {
+	struct ipa_mhi_msi_info msi;
+	u32 mmio_addr;
+	u32 first_ch_idx;
+	u32 first_er_idx;
+	bool assert_bit40;
+	mhi_client_cb notify;
+	void *priv;
+	bool test_mode;
+};
+
+/**
+ * struct ipa_mhi_start_params - parameters for IPA MHI start API
+ *
+ * @host_ctrl_addr: Base address of MHI control data structures
+ * @host_data_addr: Base address of MHI data buffers
+ * @channel_context_addr: channel context array address in host address space
+ * @event_context_addr: event context array address in host address space
+ */
+struct ipa_mhi_start_params {
+	u32 host_ctrl_addr;
+	u32 host_data_addr;
+	u64 channel_context_array_addr;
+	u64 event_context_array_addr;
+};
+
+/**
+ * struct ipa_mhi_connect_params - parameters for IPA MHI channel connect API
+ *
+ * @sys: IPA EP configuration info
+ * @channel_id: MHI channel id
+ */
+struct ipa_mhi_connect_params {
+	struct ipa_sys_connect_params sys;
+	u8 channel_id;
+};
+
+/* bit #40 in address should be asserted for MHI transfers over pcie */
+#define IPA_MHI_HOST_ADDR(addr) ((addr) | BIT_ULL(40))
+
+#if defined CONFIG_IPA || defined CONFIG_IPA3
+
+int ipa_mhi_init(struct ipa_mhi_init_params *params);
+
+int ipa_mhi_start(struct ipa_mhi_start_params *params);
+
+int ipa_mhi_connect_pipe(struct ipa_mhi_connect_params *in, u32 *clnt_hdl);
+
+int ipa_mhi_disconnect_pipe(u32 clnt_hdl);
+
+int ipa_mhi_suspend(bool force);
+
+int ipa_mhi_resume(void);
+
+void ipa_mhi_destroy(void);
+
+#else /* (CONFIG_IPA || CONFIG_IPA3) */
+
+static inline int ipa_mhi_init(struct ipa_mhi_init_params *params)
+{
+	return -EPERM;
+}
+
+static inline int ipa_mhi_start(struct ipa_mhi_start_params *params)
+{
+	return -EPERM;
+}
+
+static inline int ipa_mhi_connect_pipe(struct ipa_mhi_connect_params *in,
+	u32 *clnt_hdl)
+{
+	return -EPERM;
+}
+
+static inline int ipa_mhi_disconnect_pipe(u32 clnt_hdl)
+{
+	return -EPERM;
+}
+
+static inline int ipa_mhi_suspend(bool force)
+{
+	return -EPERM;
+}
+
+static inline int ipa_mhi_resume(void)
+{
+	return -EPERM;
+}
+
+static inline void ipa_mhi_destroy(void)
+{
+
+}
+
+#endif /* (CONFIG_IPA || CONFIG_IPA3) */
+
+#endif /* IPA_MHI_H_ */
diff --git a/include/linux/trace_events.h b/include/linux/trace_events.h
index 429fdfc3baf5..f01c2ff9845b 100644
--- a/include/linux/trace_events.h
+++ b/include/linux/trace_events.h
@@ -8,6 +8,7 @@
 #include <linux/hardirq.h>
 #include <linux/perf_event.h>
 #include <linux/tracepoint.h>
+#include <linux/coresight-stm.h>
 
 struct trace_array;
 struct trace_buffer;
@@ -231,7 +232,8 @@ void *trace_event_buffer_reserve(struct trace_event_buffer *fbuffer,
 				  struct trace_event_file *trace_file,
 				  unsigned long len);
 
-void trace_event_buffer_commit(struct trace_event_buffer *fbuffer);
+void trace_event_buffer_commit(struct trace_event_buffer *fbuffer,
+			       unsigned long len);
 
 enum {
 	TRACE_EVENT_FL_FILTERED_BIT,
@@ -500,6 +502,7 @@ __event_trigger_test_discard(struct trace_event_file *file,
  * @entry: The event itself
  * @irq_flags: The state of the interrupts at the start of the event
  * @pc: The state of the preempt count at the start of the event.
+ * @len: The length of the payload data required for stm logging.
  *
  * This is a helper function to handle triggers that require data
  * from the event itself. It also tests the event against filters and
@@ -509,12 +512,16 @@ static inline void
 event_trigger_unlock_commit(struct trace_event_file *file,
 			    struct ring_buffer *buffer,
 			    struct ring_buffer_event *event,
-			    void *entry, unsigned long irq_flags, int pc)
+			    void *entry, unsigned long irq_flags, int pc,
+			    unsigned long len)
 {
 	enum event_trigger_type tt = ETT_NONE;
 
-	if (!__event_trigger_test_discard(file, buffer, event, entry, &tt))
+	if (!__event_trigger_test_discard(file, buffer, event, entry, &tt)) {
+		if (len)
+			stm_log(OST_ENTITY_FTRACE_EVENTS, entry, len);
 		trace_buffer_unlock_commit(file->tr, buffer, event, irq_flags, pc);
+	}
 
 	if (tt)
 		event_triggers_post_call(file, tt);