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authorOsvaldo Banuelos <osvaldob@codeaurora.org>2015-11-24 11:28:29 -0800
committerDavid Keitel <dkeitel@codeaurora.org>2016-03-23 21:12:03 -0700
commit6c8839e8b1835142f88fde3c2d18b323bbc4262e (patch)
treeb0eb182aa7cdb0a4fcc29f25b1888fdfacb465e0 /include/linux
parent1e492a56bc4cff5a9476a57d475018b735942df1 (diff)
ARM: dts: msm: Program only L2 and L3 ACC SEL settings for msm8996
According to the latest hardware guidelines, only L2 and L3 cache HMSS ACC settings need to be programmed based upon the level of their voltage supplies. Update the apc0_pwrcl and apc1_perfcl mem_acc regulator devices to adhere to this requirement. Change-Id: I94032f6fbe5920a8d446c58c763afa29705e527a Signed-off-by: Osvaldo Banuelos <osvaldob@codeaurora.org>
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