Promotion of kernel.lnx.4.4-161028.

CRs      Change ID                                   Subject
--------------------------------------------------------------------------------------------------------------
1080392   I05345b8f5d108e59863ee4e37ed75fd32a284ee5   ASoC: wcd-dsp-mgr: fix restart logic when codec comes ba
1081345   I69981b603526575758376695d7a5e9affd389dbe   ARM: dts: msm: add SLPI fw name property for msmcobalt
1024862   I600c646a0c23b654392d8e00a829bfd88b71c38c   msm: mdss: Fix memleak in panel_debug_reg_write
1069060   Icbdb05aeb9211665420a872d3453dbbd24fd347b   msm: ipa: fix ioctl input param validation
1061018   I738eeb141d323ae1a77f352b11525556888a9243   ARM: dts: msm: fix sd card detection for msmcobalt QRD S
1050304   I9c7afdd74122318fc5f7ebd7c0381a4078d1fb01   msm: mdss: edid: fix dtd parsing
1082022   Iad90353f66cf5ad7f83e3fc252d82cec45abce60   platform: qpnp-revid: Add REVID details for PM/PM2FALCON
1077762   I8121d45fedab6197f8466d25674d5b0decd45f1b   ARM: dts: msm: enable esd for nt35597 panels in msmcobal
1080014   Ic5dbac9c2cd31f3193ede7cdc64249f7514e3e98   icnss: Do top level reset when timeout to pull register
1077766   Ie60587aa4a4a48bae70ceac4e053e63fc29f516a   ASoC: msm: Add routes for all TDM modes
1078147   I0aa3443a2fddfa200631b6fe9eb22de10178fe46   icnss: Do not parse VBATT DT entry if VBATT feature is d
1080392   Id9cbda04a4c36070e52919d3a34ebc871ac22a8e   ASoC: wcd934x: Trigger codec DSP subsystem restart
1081806   I42a47e4386ca7a1bbbec428c8d2cbe307634cd1e   ARM: dts: msm: Add support for Modem PIL on msmtriton
1081547   I64f0f5b15cc5d9185e415f0b26e276e111c885ec   usb: dwc3: gadget: Remove dev_WARN_ONCE in dwc3_gadget_e
1082650   Iab7fc8551b628c443ce751026b06c5ff4ebba39a   sched: Fix compilation issue with reset_hmp_stats
1082650   Idb74e9df4fcb55085ac869f5ba273cef4a3eb9eb   sched/fair: Fix compilation issue
1069188   I2939e9fd37e96f37101b93dabd86cfdaaf06907f   ASoC: wcd934x: Add support for audio subsystem restart
1081010   I16e500aa87813cd3a1e18f134ea1ed145b9e1ef8   msm: sde: Fix SDE rotator clock disable sequence
1074914   I94b9091b8349d6388fbe5c29eabe3666c86e5cce   ASoC: msm: Enable Media Format converter for all resampl
1081806   I3e700bdae21b6e18b28cf5982e42e73d7ae953a5   ARM: dts: msm: Add support for Modem PIL on msmfalcon
1077762   I3df0889c1225dcb613910cb90f050a2994f5834d   msm: mdss: fix crash when wrong params are passed on the
1065513   I29b9ea41df467d0092be8005733016843dc26f60   input: touchscreen: replace macros used inside the funct
1082047   I6a678d9133b06dda2de1c6cfe4bbafacc594f299   leds: qpnp-wled: add a secure write API
1076402   If06c421c559277066cf9ffd86e71fe366ab7bf8d   leds: qpnp-flash-v2: fix safety timer configuration
1081279   I1b614cb70aa43087c122ce6c42305491e5f5b34b   clk: qcom: Change clock index for mmssnoc_axi clock for
1081803   Ib0d27c13c0ebdfac629c1469c9a91a0b84d03640   soc: qcom: pil-q6v5: Add support for qdspv62.1.5 reset
1080796   Ife9d6a16e1607b40c71eb1897947bf4645ac9561   USB: dwc3-msm: Disable pipe clock requirement for HS/FS
1025311   I5f9627964d86c51cb8fb0c5c5f7c9f5f2e19b3e7   cfg80211: Add support to configure a beacon data rate
1081430   I2abd67a8ff647165ddedb385e80f8705d73d3100   input: touchscreen: fix compilation errors for Goodix dr
1077525   I012484aa92e8f25ed0ad4f6709a54f40409ab8d2   msm: ipa: Fix the memory leak in error cases
1079971   Ib6bddd5f43b41660304d240db39f4e273ede3af0   input: misc: hbtp_input: Add support for multiple AFE
1082047   I4c99b598d5f484368712eab239f7de70b727c2aa   leds: qpnp-wled: Fix configuration of AVDD TRIM and OVP
1075303   I0552bf8a48c214b89e160fe4df145973f02c2788   ASoC: wcd934x-dsp-cntl: fix memory enable/disable sequen
1079311   I58421ba7f784f7467015a5943aecc2dd0022145a   leds: qpnp-flash-v2: fix ITARGET configuration
1048242   I2ef9f3e122b39682a743334668fcd0aeb085e147   qcom-charger: set optimal buck switching frequency
1080290   I0f48666ac948a9571e249598ae7cc19df9036b1d   qseecom: check buffer size when loading firmware images
1022917   Ib846318dc3d359672314485d386a23fd8621bfda   ARM: dts: msm: Add dmic clock rate on ECPP path for msmc
1072280   I9640112b8945dc603e3af55fc1096bea9f7e6634   ASoC: qdsp6v2: fix potential bug of infinite loop
1082047   If0646f5ae111f75ababc405cbd2f7bcea899360e   leds: qpnp-wled: add support to read pmic revid
1043802   I1d9d7a6b6bd2d3420a28a8c09868143bb9bd3b27   soc: qcom: add support for fingerprint sensor driver
1076516   If68d029c87db2370f07f279aacbc51d139f00aae   msm: mdss: dp: trigger link retraining on link status up
1077773   I99fcbc5c1b36f62ecfa7631f1b51633a7fb08417   ASoC: msmcobalt: Add support for all TDM modes
1080331   Iaec3a17e5eed952ba0abdcffbf321ad942486769   drivers: mfd: wcd934x: Set MBHC registers to volatile
1082440   I287761ce5b13dc139f59270dceac67cc9ae45cff   defconfig: Enable CONFIG_ICNSS_DEBUG for 32-bit msmfalco
1082440   I6028d4a01ddfd8f8589a1de5322c2780d256d5bc   defconfig: Enable CONFIG_ICNSS_DEBUG for 32-bit msmcorte
1024872   I03ce718b0456d437d31d701586965d0aa7443b51   msm: mdss: Correct the format specifiers in sscanf funct
1076227   Ic756deeabeb0eaaf95e5354b565cf20a85fd7cca   msm: mdss: dp: remove programming of maud/naud for audio
1024934   I533e2d6a760ebd52047c521c1a1e85bfc754fce1   msm: mdss: Fix memleak in framebuffer register and remov
1081757   I13156d82f544cd28a1579c23b18182c879c85767   clk: osm: msm: allow WDOG status register to be enabled
1077761   I9cc07edd7d72e7fae8f95b16461aac75c3fa1fc9   ARM: dts: msm: add support for all TDM modes
1024850   I10ea6f2b22d554d02f302f5700f6674d08e4777d   msm: mdss: Check for buffer boundary condition in panel_
1073650   I2836ef5b7f37f627a32a0b4332dc299a60012704   msm: mdss: Avoid adaptive variable refresh during dynami
1081345   I9ecc0cc1b5de5e0bd47c658747463a4498123655   sensors: ssc: add support to read SLPI fw name
1077762   Ia03f76cf13d3787e2e13e27ae0360723fe36d615   ARM: dts: msm: enable esd for jdi qhd cmd mode panel in
1077684   I340f778583bb63d6436c4ef8f51ead77a2871625   msm: mdss: Correct settings when on/off happens in dest-
1022917   I772e05990a796c99c3b6b6f50323d87b5894231b   ASoC: msmcobalt: Fix MCLK routing on msmcobalt for WCD93
1082191   If3d964840362b6147ba7c9e26c4a3f5d20e5a557   clk: msm: clock: Remove controlling some graphics clocks
1051643 1054360   I1b3af2a59dabf67a947a59334883ce0437c9ee6f   ARM: dts: msm: add PCIe PHY sequence for msmcobalt v2

Change-Id: I673d05df7b013787ac73574a972dd7bade7332af
CRs-Fixed: 1076227, 1081757, 1077766, 1077761, 1072280, 1077762, 1022917, 1074914, 1069060, 1051643, 1076516, 1081430, 1080290, 1077525, 1078147, 1081803, 1024862, 1077684, 1048242, 1081806, 1025311, 1081345, 1050304, 1065513, 1081547, 1061018, 1073650, 1082191, 1077773, 1079311, 1082440, 1082650, 1081010, 1080796, 1024872, 1076402, 1054360, 1024934, 1080331, 1079971, 1043802, 1075303, 1024850, 1080392, 1069188, 1082022, 1082047, 1080014, 1081279

14 files changed, 70 insertions, 16 deletions

diff --git a/include/linux/bpf.h b/include/linux/bpf.h
index 83d1926c61e4..67bc2da5d233 100644
--- a/include/linux/bpf.h
+++ b/include/linux/bpf.h
@@ -165,12 +165,13 @@ void bpf_register_prog_type(struct bpf_prog_type_list *tl);
 void bpf_register_map_type(struct bpf_map_type_list *tl);
 
 struct bpf_prog *bpf_prog_get(u32 ufd);
+struct bpf_prog *bpf_prog_inc(struct bpf_prog *prog);
 void bpf_prog_put(struct bpf_prog *prog);
 void bpf_prog_put_rcu(struct bpf_prog *prog);
 
 struct bpf_map *bpf_map_get_with_uref(u32 ufd);
 struct bpf_map *__bpf_map_get(struct fd f);
-void bpf_map_inc(struct bpf_map *map, bool uref);
+struct bpf_map *bpf_map_inc(struct bpf_map *map, bool uref);
 void bpf_map_put_with_uref(struct bpf_map *map);
 void bpf_map_put(struct bpf_map *map);
 
diff --git a/include/linux/cgroup-defs.h b/include/linux/cgroup-defs.h
index e63d3a513e67..788c7c49a673 100644
--- a/include/linux/cgroup-defs.h
+++ b/include/linux/cgroup-defs.h
@@ -435,6 +435,7 @@ struct cgroup_subsys {
 	int (*can_attach)(struct cgroup_taskset *tset);
 	void (*cancel_attach)(struct cgroup_taskset *tset);
 	void (*attach)(struct cgroup_taskset *tset);
+	void (*post_attach)(void);
 	int (*can_fork)(struct task_struct *task, void **priv_p);
 	void (*cancel_fork)(struct task_struct *task, void *priv);
 	void (*fork)(struct task_struct *task, void *priv);
diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h
index 0de2d0c780d7..9a4a80ae5eaf 100644
--- a/include/linux/clk-provider.h
+++ b/include/linux/clk-provider.h
@@ -387,6 +387,7 @@ struct clk_divider {
 #define CLK_DIVIDER_MAX_AT_ZERO		BIT(6)
 
 extern const struct clk_ops clk_divider_ops;
+extern const struct clk_ops clk_divider_ro_ops;
 
 unsigned long divider_recalc_rate(struct clk_hw *hw, unsigned long parent_rate,
 		unsigned int val, const struct clk_div_table *table,
diff --git a/include/linux/cpuset.h b/include/linux/cpuset.h
index fea160ee5803..85a868ccb493 100644
--- a/include/linux/cpuset.h
+++ b/include/linux/cpuset.h
@@ -137,8 +137,6 @@ static inline void set_mems_allowed(nodemask_t nodemask)
 	task_unlock(current);
 }
 
-extern void cpuset_post_attach_flush(void);
-
 #else /* !CONFIG_CPUSETS */
 
 static inline bool cpusets_enabled(void) { return false; }
@@ -245,10 +243,6 @@ static inline bool read_mems_allowed_retry(unsigned int seq)
 	return false;
 }
 
-static inline void cpuset_post_attach_flush(void)
-{
-}
-
 #endif /* !CONFIG_CPUSETS */
 
 #endif /* _LINUX_CPUSET_H */
diff --git a/include/linux/dcache.h b/include/linux/dcache.h
index e4221f7c5b53..d184e283cf81 100644
--- a/include/linux/dcache.h
+++ b/include/linux/dcache.h
@@ -593,4 +593,16 @@ static inline struct dentry *d_real(struct dentry *dentry)
 		return dentry;
 }
 
+static inline struct inode *vfs_select_inode(struct dentry *dentry,
+					     unsigned open_flags)
+{
+	struct inode *inode = d_inode(dentry);
+
+	if (inode && unlikely(dentry->d_flags & DCACHE_OP_SELECT_INODE))
+		inode = dentry->d_op->d_select_inode(dentry, open_flags);
+
+	return inode;
+}
+
+
 #endif	/* __LINUX_DCACHE_H */
diff --git a/include/linux/efi.h b/include/linux/efi.h
index 47be3ad7d3e5..333d0ca6940f 100644
--- a/include/linux/efi.h
+++ b/include/linux/efi.h
@@ -299,7 +299,7 @@ typedef struct {
 	void *open_protocol_information;
 	void *protocols_per_handle;
 	void *locate_handle_buffer;
-	void *locate_protocol;
+	efi_status_t (*locate_protocol)(efi_guid_t *, void *, void **);
 	void *install_multiple_protocol_interfaces;
 	void *uninstall_multiple_protocol_interfaces;
 	void *calculate_crc32;
@@ -599,6 +599,10 @@ void efi_native_runtime_setup(void);
 #define EFI_PROPERTIES_TABLE_GUID \
     EFI_GUID(  0x880aaca3, 0x4adc, 0x4a04, 0x90, 0x79, 0xb7, 0x47, 0x34, 0x08, 0x25, 0xe5 )
 
+#define EFI_RNG_PROTOCOL_GUID \
+	EFI_GUID(0x3152bca5, 0xeade, 0x433d, \
+		 0x86, 0x2e, 0xc0, 0x1c, 0xdc, 0x29, 0x1f, 0x44)
+
 typedef struct {
 	efi_guid_t guid;
 	u64 table;
diff --git a/include/linux/hash.h b/include/linux/hash.h
index d0494c399392..a75b1009d3f7 100644
--- a/include/linux/hash.h
+++ b/include/linux/hash.h
@@ -33,12 +33,28 @@
 #error Wordsize not 32 or 64
 #endif
 
+/*
+ * The above primes are actively bad for hashing, since they are
+ * too sparse. The 32-bit one is mostly ok, the 64-bit one causes
+ * real problems. Besides, the "prime" part is pointless for the
+ * multiplicative hash.
+ *
+ * Although a random odd number will do, it turns out that the golden
+ * ratio phi = (sqrt(5)-1)/2, or its negative, has particularly nice
+ * properties.
+ *
+ * These are the negative, (1 - phi) = (phi^2) = (3 - sqrt(5))/2.
+ * (See Knuth vol 3, section 6.4, exercise 9.)
+ */
+#define GOLDEN_RATIO_32 0x61C88647
+#define GOLDEN_RATIO_64 0x61C8864680B583EBull
+
 static __always_inline u64 hash_64(u64 val, unsigned int bits)
 {
 	u64 hash = val;
 
-#if defined(CONFIG_ARCH_HAS_FAST_MULTIPLIER) && BITS_PER_LONG == 64
-	hash = hash * GOLDEN_RATIO_PRIME_64;
+#if BITS_PER_LONG == 64
+	hash = hash * GOLDEN_RATIO_64;
 #else
 	/*  Sigh, gcc can't optimise this alone like it does for 32 bits. */
 	u64 n = hash;
diff --git a/include/linux/hugetlb.h b/include/linux/hugetlb.h
index 685c262e0be8..b0eb06423d5e 100644
--- a/include/linux/hugetlb.h
+++ b/include/linux/hugetlb.h
@@ -96,9 +96,7 @@ u32 hugetlb_fault_mutex_hash(struct hstate *h, struct mm_struct *mm,
 				struct address_space *mapping,
 				pgoff_t idx, unsigned long address);
 
-#ifdef CONFIG_ARCH_WANT_HUGE_PMD_SHARE
 pte_t *huge_pmd_share(struct mm_struct *mm, unsigned long addr, pud_t *pud);
-#endif
 
 extern int hugepages_treat_as_movable;
 extern int sysctl_hugetlb_shm_group;
diff --git a/include/linux/mfd/samsung/s2mps11.h b/include/linux/mfd/samsung/s2mps11.h
index b288965e8101..2c14eeca46f0 100644
--- a/include/linux/mfd/samsung/s2mps11.h
+++ b/include/linux/mfd/samsung/s2mps11.h
@@ -173,10 +173,12 @@ enum s2mps11_regulators {
 
 #define S2MPS11_LDO_VSEL_MASK	0x3F
 #define S2MPS11_BUCK_VSEL_MASK	0xFF
+#define S2MPS11_BUCK9_VSEL_MASK	0x1F
 #define S2MPS11_ENABLE_MASK	(0x03 << S2MPS11_ENABLE_SHIFT)
 #define S2MPS11_ENABLE_SHIFT	0x06
 #define S2MPS11_LDO_N_VOLTAGES	(S2MPS11_LDO_VSEL_MASK + 1)
 #define S2MPS11_BUCK_N_VOLTAGES (S2MPS11_BUCK_VSEL_MASK + 1)
+#define S2MPS11_BUCK9_N_VOLTAGES (S2MPS11_BUCK9_VSEL_MASK + 1)
 #define S2MPS11_RAMP_DELAY	25000		/* uV/us */
 
 #define S2MPS11_CTRL1_PWRHOLD_MASK	BIT(4)
diff --git a/include/linux/mlx5/device.h b/include/linux/mlx5/device.h
index 0b473cbfa7ef..a91b67b18a73 100644
--- a/include/linux/mlx5/device.h
+++ b/include/linux/mlx5/device.h
@@ -334,6 +334,17 @@ enum {
 	MLX5_CAP_OFF_CMDIF_CSUM		= 46,
 };
 
+enum {
+	/*
+	 * Max wqe size for rdma read is 512 bytes, so this
+	 * limits our max_sge_rd as the wqe needs to fit:
+	 * - ctrl segment (16 bytes)
+	 * - rdma segment (16 bytes)
+	 * - scatter elements (16 bytes each)
+	 */
+	MLX5_MAX_SGE_RD	= (512 - 16 - 16) / 16
+};
+
 struct mlx5_inbox_hdr {
 	__be16		opcode;
 	u8		rsvd[4];
diff --git a/include/linux/mlx5/driver.h b/include/linux/mlx5/driver.h
index af3efd9157f0..412aa988c6ad 100644
--- a/include/linux/mlx5/driver.h
+++ b/include/linux/mlx5/driver.h
@@ -792,9 +792,9 @@ int mlx5_set_port_admin_status(struct mlx5_core_dev *dev,
 int mlx5_query_port_admin_status(struct mlx5_core_dev *dev,
 				 enum mlx5_port_status *status);
 
-int mlx5_set_port_mtu(struct mlx5_core_dev *dev, int mtu, u8 port);
-void mlx5_query_port_max_mtu(struct mlx5_core_dev *dev, int *max_mtu, u8 port);
-void mlx5_query_port_oper_mtu(struct mlx5_core_dev *dev, int *oper_mtu,
+int mlx5_set_port_mtu(struct mlx5_core_dev *dev, u16 mtu, u8 port);
+void mlx5_query_port_max_mtu(struct mlx5_core_dev *dev, u16 *max_mtu, u8 port);
+void mlx5_query_port_oper_mtu(struct mlx5_core_dev *dev, u16 *oper_mtu,
 			      u8 port);
 
 int mlx5_query_port_vl_hw_cap(struct mlx5_core_dev *dev,
diff --git a/include/linux/mm.h b/include/linux/mm.h
index cbe9b794c714..57a44fa9ab89 100644
--- a/include/linux/mm.h
+++ b/include/linux/mm.h
@@ -1097,6 +1097,8 @@ struct zap_details {
 
 struct page *vm_normal_page(struct vm_area_struct *vma, unsigned long addr,
 		pte_t pte);
+struct page *vm_normal_page_pmd(struct vm_area_struct *vma, unsigned long addr,
+				pmd_t pmd);
 
 int zap_vma_ptes(struct vm_area_struct *vma, unsigned long address,
 		unsigned long size);
diff --git a/include/linux/net.h b/include/linux/net.h
index 0b4ac7da583a..25ef630f1bd6 100644
--- a/include/linux/net.h
+++ b/include/linux/net.h
@@ -245,7 +245,15 @@ do {								\
 	net_ratelimited_function(pr_warn, fmt, ##__VA_ARGS__)
 #define net_info_ratelimited(fmt, ...)				\
 	net_ratelimited_function(pr_info, fmt, ##__VA_ARGS__)
-#if defined(DEBUG)
+#if defined(CONFIG_DYNAMIC_DEBUG)
+#define net_dbg_ratelimited(fmt, ...)					\
+do {									\
+	DEFINE_DYNAMIC_DEBUG_METADATA(descriptor, fmt);			\
+	if (unlikely(descriptor.flags & _DPRINTK_FLAGS_PRINT) &&	\
+	    net_ratelimit())						\
+		__dynamic_pr_debug(&descriptor, fmt, ##__VA_ARGS__);	\
+} while (0)
+#elif defined(DEBUG)
 #define net_dbg_ratelimited(fmt, ...)				\
 	net_ratelimited_function(pr_debug, fmt, ##__VA_ARGS__)
 #else
diff --git a/include/linux/qpnp/qpnp-revid.h b/include/linux/qpnp/qpnp-revid.h
index 7c12823894df..652d68ac63bf 100644
--- a/include/linux/qpnp/qpnp-revid.h
+++ b/include/linux/qpnp/qpnp-revid.h
@@ -177,6 +177,10 @@
 /* PMICOBALT */
 #define PMICOBALT_SUBTYPE	0x15
 
+/* PMFALCON */
+#define PM2FALCON_SUBTYPE	0x1A
+#define PMFALCON_SUBTYPE	0x1B
+
 #define PMICOBALT_V1P0_REV1	0x00
 #define PMICOBALT_V1P0_REV2	0x00
 #define PMICOBALT_V1P0_REV3	0x00