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| author | Sahitya Tummala <stummala@codeaurora.org> | 2013-08-29 16:21:08 +0530 |
|---|---|---|
| committer | Subhash Jadavani <subhashj@codeaurora.org> | 2016-05-27 10:28:53 -0700 |
| commit | 2ba264341c60b4a5ab95ef75575a92b941cedc9d (patch) | |
| tree | 9af8fc7e7197febcfc4285a9adeb050d23336f8e /include/linux | |
| parent | 3118da1c322234006a43f84aef70a399ac3ce643 (diff) | |
mmc: sdhci-msm: Fix issue with power save bit enablement
The power save bit is currently enabled based on the clock
rate (clk_rate > 400KHz) within struct sdhci_msm_host. But this
clk_rate is updated with the latest value down in this function
sdhci_msm_set_clock(). So during runtime/system resume when the
card is still in initialization phase, the power save bit is
getting enabled when sdhci_msm_set_clock() is called for the
first time based on the previous rate which is wrong.
Change-Id: I05dc8a4a760f658935de3831aaf8dd3b2b996466
Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
Diffstat (limited to 'include/linux')
0 files changed, 0 insertions, 0 deletions