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| author | Venkat Gopalakrishnan <venkatg@codeaurora.org> | 2015-09-04 18:32:25 -0700 |
|---|---|---|
| committer | Subhash Jadavani <subhashj@codeaurora.org> | 2016-05-31 15:27:24 -0700 |
| commit | b6184a1b463a6f16ca33ae9699942075843d2e12 (patch) | |
| tree | 13ff4bc8a3cdeb8526191715903f93b12328ca3b /include/linux/timerqueue.h | |
| parent | ffdb0e974a9981322d0bc3548f6421a15a4de90b (diff) | |
mmc: sdhci-msm: fix register address change for DDR_CONFIG
The power on reset value of DDR_CONFIG register was fixed in
controller revision (major - 0x1 and minor > 0x49) to address
the default rclk delay value after characterization. The register
offset for this register was also changed starting from this
revision. Make necessary changes to account for this.
Change-Id: I4e4a87aebd24e5669b03a914c6e0f4b469f5ec7b
Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
Diffstat (limited to 'include/linux/timerqueue.h')
0 files changed, 0 insertions, 0 deletions