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| author | Subhash Jadavani <subhashj@codeaurora.org> | 2014-09-21 00:00:27 -0700 |
|---|---|---|
| committer | David Keitel <dkeitel@codeaurora.org> | 2016-03-22 10:57:29 -0700 |
| commit | 9d89b6c4c80db9b7d62f40e5cca9b8730c828ada (patch) | |
| tree | c4e1c9cb801f3ec48d23dc1c451e5f81ba85e927 /include/linux/stacktrace.h | |
| parent | 8c17ea4d5b35ea2004ccea98ee8c8cdf308ba535 (diff) | |
scsi: ufs-qcom: enable host controller hardware clock gating
The UTP controller has a number of internal clock gating cells (CGCs).
Internal hardware sub-modules within the UTP controller control the CGCs.
Hardware CGCs disable the clock to inactivate UTP sub-modules not involved
in a specific operation, UTP controller CGCs are by default disabled and
this change enables them (after every UFS link startup) to save some power
leakage.
Change-Id: I47bba62436c5913eb6755e59c36a11fea2e9468f
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
Diffstat (limited to 'include/linux/stacktrace.h')
0 files changed, 0 insertions, 0 deletions