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authorKalyan Thota <kalyant@codeaurora.org>2014-05-29 16:09:56 +0530
committerDavid Keitel <dkeitel@codeaurora.org>2016-03-23 20:30:24 -0700
commit92df9765a0cece0cccc32695279d0ad50b89666b (patch)
tree344b3c1a4d9a0098b21a2d2aa1d63bdd08a7ebe3 /include/linux/stackprotector.h
parent7e06fea357f74f121ff9705247a3073686aaa313 (diff)
msm: mdss: handle WB2 irq for MDSS 1.8.0
In MDSS 1.8.0, bit 2 in intr enable and intr status register is marked for WB2 which is different from the other targets. Add changes to handle the same. Change-Id: I76947bc218c897e121bb22fbda7aaa57723ec708 Signed-off-by: Kalyan Thota <kalyant@codeaurora.org>
Diffstat (limited to 'include/linux/stackprotector.h')
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